Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp J-FET SOT 23 5

OPA653

OUT

IN-

IN+

160 W

49.9 W

160 W

49.9 W

0.1 Fm 10 Fm

+6V

-6V

50-W

Load

50-W

Source

S+

S-

-18

SignalGain(dB)

100k

1M

10M 100M 1G

Frequency(Hz)

V =200mV

O PP

SMALL-SIGNALFREQUENCYRESPONSE

NONINVERTINGGAINOF+2V/V

50- TESTENVIRONMENTW

OPA653

www.ti.com

SBOS348A –DECEMBER 2008–REVISED NOVEMBER 2009

Wideband, Fixed Gain, JFET-Input AMPLIFIER

Check for Samples: OPA653

FEATURES

DESCRIPTION

• HIGH BANDWIDTH: 500 MHz (G = +2 V/V)

The OPA653 combines a very wideband

voltage-feedback operational amplifier with a

• HIGH SLEW RATE: 2675 V/μs (4-V Step)

JFET-input stage with internal gain setting resistors to

• EXCELLENT THD: –71dBc at 10 MHz

achieve an ultra-high, dynamic-range amplifier for

• LOW INPUT VOLTAGE NOISE: 6.1 nV/√Hz

fixed gain of +2-V/V or –1-V/V applications.

• FAST OVERDRIVE RECOVERY: 8 ns

The 500-MHz wide gain of +2-V/V bandwidth is

• FAST SETTLING TIME (1% 4-V Step): 7.9 ns

complemented by a very high 2675-V/μs slew rate

and fast settling time that make it ideal for

• LOW INPUT OFFSET VOLTAGE: ±1 mV

time-domain and pulse-oriented applications.

• LOW INPUT BIAS CURRENT: ±10 pA

Excellent –72-dBc THD distortion performance at

• HIGH INPUT IMPEDANCE: 10

Ω||2.5 pF

10 MHz makes the OPA653 an excellent choice for

• INTERNAL GAIN SETTING RESISTORS:

frequency-domain and FFT analysis applications.

G = +2 V/V or G = –1 V/V

Additionally, with the low 6.1-nV/√Hz voltage noise,

• HIGH OUTPUT CURRENT: 70 mA

low bias current, and high impedance JFET input, it

supports very low noise, wideband, high input

APPLICATIONS

impedance applications. Examples include

• TEST AND MEASUREMENT FRONT-END

high-impedance probes, data acquisition cards, and

• HIGH-INPUT IMPEDANCE PROBES

oscilloscope front-ends.

• DATA ACQUISITION CARDS

• OSCILLOSCOPE INPUT

OPERATIONAL AMPLIFIER

• ADC INPUT AMPLIFIER

PRODUCTS

VOLTAGE

SLEW

RATE NOISE AMPLIFIER

DEVICE V

(V) (MHz) (V/μs) (nV/√Hz) DESCRIPTION

Unity-Gain

OPA356 +5 200 300 5.80

Stable CMOS

Unity-Gain

OPA656 ±5 500 290 7 Stable

JFET-Input

Gain of +7

OPA657 ±5 350 700 4.8 Stable

JFET-Input

Unity-Gain

OPA659 ±6 650 2550 8.9 Stable

JFET-Input

Unity-Gain

THS4631 ±15 105 900 7 Stable

JFET-Input

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPAD is a trademark of Texas Instruments.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

PAGE 1
OPA653 OP A6 53 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 Wideband, Fixed Gain, JFET-Input AMPLIFIER Check for Samples: OPA653 FEATURES DESCRIPTION • • • • • • • • • • The OPA653 combines a very wideband voltage-feedback operational amplifier with a JFET-input stage with internal gain setting resistors to achieve an ultra-high, dynamic-range amplifier for fixed gain of +2-V/V or –1-V/V applications.
PAGE 2
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 ELECTRICAL CHARACTERISTICS: VS = ±6 V At G = +2 V/V, RL = 100 Ω, and TA = +25°C, unless otherwise noted. OPA653 PARAMETER CONDITIONS MIN TYP MAX UNIT TEST LEVEL (1) AC PERFORMANCE Small-Signal Bandwidth VO = 200 mVPP 500 MHz C Bandwidth for 0.1-dB Flatness VO = 2 VPP 75 MHz C Large-Signal Bandwidth VO = 2 VPP 475 MHz B Slew Rate VO = 4-V Step 2675 V/μs B Rise and Fall Time VO = 4-V Step 1.
PAGE 4
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS: VS = ±6 V (continued) At G = +2 V/V, RL = 100 Ω, and TA = +25°C, unless otherwise noted. OPA653 PARAMETER UNIT TEST LEVEL (1) ±6.5 V B 33.5 mA A 35.7 mA B 66 dB A 64 dB B °C C CONDITIONS MIN TYP MAX TA = –40°C to +85°C ±3.5 ±6 TA = +25°C 30.5 32 TA = –40°C to +85°C 28.3 TA = +25°C, ±VS = 5.5 V to 6.5 V 62 TA = –40°C to +85°C, ±VS = 5.5 V to 6.
PAGE 5
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS: VS = ±6 V At G = +2 V/V, RL = 100 Ω, and TA = +25°C, unless otherwise noted. SMALL-SIGNAL FREQUENCY RESPONSE (VO = 200 mVPP) NONINVERTING LARGE-SIGNAL FREQUENCY RESPONSE 8 G = -1 V/V 3 VO = 1.0 VPP 7 0 6 VO = 0.5 VPP Signal Gain (dB) Normalized Signal Gain (dB) 6 G = +2 V/V -3 -6 -9 5 VO = 4.0 VPP 4 3 VO = 2.0 VPP -12 2 -15 1 -18 100 k G = +2 V/V 0 100 k 1M 10 M 1M 100 M 1G VO = 6.
PAGE 6
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS: VS = ±6 V (continued) At G = +2 V/V, RL = 100 Ω, and TA = +25°C, unless otherwise noted.
PAGE 7
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS: VS = ±6 V (continued) At G = +2 V/V, RL = 100 Ω, and TA = +25°C, unless otherwise noted.
PAGE 8
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS: VS = ±6 V (continued) At G = +2 V/V, RL = 100 Ω, and TA = +25°C, unless otherwise noted. SLEW RATE vs VOUT STEP OUTPUT VOLTAGE SWING vs RLOAD 4000 5 4 Falling 3 2 Rising VOUT (V) Slew Rate (V/ms) 3000 2000 1 VOUT High 0 VOUT Low -1 -2 1000 -3 -4 0 -5 1 2 3 4 5 6 0 VOUT Step (V) 1k RLOAD (W) Figure 19. 8 100 200 300 400 500 600 700 800 900 Figure 20.
PAGE 9
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 APPLICATION INFORMATION Wideband, Noninverting, and Inverting Operation The OPA653 is a very broadband, voltage-feedback amplifier with internal gain-setting resistors that set a fixed gain of +2 V/V or -1 V/V and a high-impedance JFET-input stage. Its very high bandwidth of 500 MHz can be used to either deliver high signal bandwidths at a gain of +2 V/V or, if driven from a low-impedance source, a gain of –1 V/V .
PAGE 10
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com OPERATING SUGGESTIONS Setting Resistor Values to Minimize Noise The OPA653 provides a low input noise voltage. Figure 23 shows the op amp noise analysis model with all the noise terms included. In this model, all the noise terms are taken to be noise voltage or current density terms in either nV/√Hz or pA/√Hz. eN OPA653 However, attention should be paid to the value of RT or other source impedance on the noninverting input.
PAGE 11
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 The Typical Characteristics show the recommended RISO versus Capacitive Load performance (see Figure 17) and the resulting frequency response with a 1-kΩ load. Note that larger RISO values are required for lower capacitive loading. In this case, a design target of a maximally-flat frequency response was used. Lower values of RISO may be used if some peaking can be tolerated.
PAGE 12
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com Other network components, such as noninverting input termination resistors, should also be placed close to the package. Even with a low parasitic capacitance, excessively high resistor values can create significant time constants that can degrade device performance. Good axial metal film or surface-mount resistors have approximately 0.2 pF in shunt with the resistor. For resistor values greater than 1.
PAGE 13
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 For proper operation, the PowerPAD must be tied to the most negative supply voltage. It is recommended to use five evenly-spaced vias under the device as shown in the EVM layer views (see Figure 27). For more general data and detailed information about the PowerPAD package, refer to the PowerPAD™ Thermally Enhanced Package application note (SLMA002). space EVALUATION MODULE Schematic and PCB Layout Figure 26 is the OPA653EVM schematic.
PAGE 14
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com Bill of Materials Table 1 lists the bill of materials for the OPA653EVM as supplied from TI. Table 1. OPA653EVM Parts List 14 SMD SIZE REFERENCE DESIGNATOR QUANTITY D C1, C2 2 (AVX) TAJ106K035R 0603 C3, C4 2 (AVX) 0603YC104KAT2A R1, R2 2 (ROHM) MCR03EZPJ000 0603 R4 1 0603 R3, R5 2 (ROHM) MCR03EZPFX49R9 Jack, Banana Receptance, 0.25-in dia.
PAGE 15
OPA653 www.ti.com SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
PAGE 16
OPA653 SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (December, 2008) to Revision A Page • Deleted lead temperature specification from Absolute Maximum Ratings table .................................................................. 2 • Added Input offset voltage specifications for DBV package; noted that existing specifications apply to DRB package .....
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.
PAGE 18
PACKAGE OPTION ADDENDUM www.ti.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ OPA653IDBVR SOT-23 3000 180.0 DBV 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) 8.4 3.2 3.1 1.39 4.0 W Pin1 (mm) Quadrant 8.0 Q3 OPA653IDBVT SOT-23 DBV 5 250 180.0 8.4 3.2 3.1 1.39 4.0 8.0 Q3 OPA653IDRBR SON DRB 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.
PAGE 20
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA653IDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 OPA653IDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 OPA653IDRBR SON DRB 8 3000 367.0 367.0 35.0 OPA653IDRBT SON DRB 8 250 210.0 185.0 35.
PAGE 21
PAGE 22
PAGE 23
PAGE 24
PAGE 25
PAGE 26
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.