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Wideband, Ultra-Low Noise, Voltage-Feedback

OPERATIONAL AMPLIFIER with Shutdown

APPLICATIONS

● HIGH DYNAMIC RANGE ADC PREAMPS

● LOW NOISE, WIDEBAND, TRANSIMPEDANCE

AMPLIFIERS

● WIDEBAND, HIGH GAIN AMPLIFIERS

● LOW NOISE DIFFERENTIAL RECEIVERS

● ULTRASOUND CHANNEL AMPLIFIERS

● IMPROVED UPGRADE FOR THE OPA687,

CLC425, AND LMH6624

FEATURES

● HIGH GAIN BANDWIDTH: 3.9GHz

● LOW INPUT VOLTAGE NOISE: 0.85nV/

√Hz

● VERY LOW DISTORTION: –105dBc (5MHz)

● HIGH SLEW RATE: 950V/µs

● HIGH DC ACCURACY: V

< ±100µV

● LOW SUPPLY CURRENT: 18.1mA

● LOW SHUTDOWN POWER: 2mW

● STABLE FOR GAINS

≥ 12

Ultra-High Dynamic Range

Differential ADC Driver

DESCRIPTION

The OPA847 combines very high gain bandwidth and large

signal performance with an ultra-low input noise voltage

(0.85nV/

√Hz

) while using only 18mA supply current. Where

power saving is critical, the OPA847 also includes an op-

tional power shutdown pin that, when pulled low, disables the

amplifier and decreases the supply current to < 1% of the

powered-up value. This optional feature may be left discon-

nected to ensure normal amplifier operation when no power-

down is required.

The combination of very low input voltage and current noise,

along with a 3.9GHz gain bandwidth product, make the

OPA847 an ideal amplifier for wideband transimpedance

applications. As a voltage gain stage, the OPA847 is opti-

mized for a flat frequency response at a gain of +20V/V and

is stable down to gains as low as +12V/V. New external

compensation techniques allow the OPA847 to be used at

any inverting gain with excellent frequency response control.

Using this technique in a differential Analog-to-Digital Con-

verter (ADC) interface application, shown below, can deliver

one of the highest dynamic-range interfaces available.

OPA847

SBOS251E – JULY 2002 – REVISED DECEMBER 2008

www.ti.com

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

+5V

–5V

OPA847

+5V

–5V

850Ω

39pF

OPA847

1.7pF

100pF

INP

INN

0.1µF

1.7pF

850Ω

39pF

100Ω

20Ω

2kΩ

20Ω

0.001µF

1:2

50Ω Source

< 5.1dB

Noise

Figure

ADS5500

14-Bit

125MSPS

100Ω

100pF

24.6dB Gain

Frequency (MHz)

DIFFERENTIAL OPA847 DRIVER DISTORTION

Harmonic Distortion (dBc)

–70

–75

–80

–85

–90

–95

–100

–105

–110

20 30 40 50

, at converter input.

2nd-Harmonic

3rd-Harmonic

OPA847 RELATED PRODUCTS

INPUT NOISE GAIN BANDWIDTH

SINGLES VOLTAGE (nV/

√Hz

) PRODUCT (MHz)

OPA842 2.6 200

OPA843 2.0 800

OPA846 1.2 1750

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

All trademarks are the property of their respective owners.

Summary of content (30 pages)

PAGE 1
OPA OPA847 847 www.ti.com SBOS251E – JULY 2002 – REVISED DECEMBER 2008 Wideband, Ultra-Low Noise, Voltage-Feedback OPERATIONAL AMPLIFIER with Shutdown FEATURES DESCRIPTION ● ● ● ● ● ● ● ● The OPA847 combines very high gain bandwidth and large signal performance with an ultra-low input noise voltage (0.85nV/√Hz) while using only 18mA supply current.
PAGE 2
ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC DISCHARGE SENSITIVITY Power Supply ............................................................................... ±6.5VDC Internal Power Dissipation ........................ See Thermal Analysis Section Differential Input Voltage .................................................................. ±1.2V Input Voltage Range ............................................................................ ±VS Storage Temperature Range: D, DBV ...........................
PAGE 3
ELECTRICAL CHARACTERISTICS: VS = ±5V Boldface limits are tested at +25°C. RL = 100Ω, RF = 750Ω, RG = 39.2Ω, and G = +20 (see Figure 1 for AC performance only), unless otherwise noted. OPA847ID, IDBV TYP PARAMETER AC PERFORMANCE (see Figure 1) Closed-Loop Bandwidth Gain Bandwidth Product (GBP) Bandwidth for 0.
PAGE 4
TYPICAL CHARACTERISTICS: VS = ±5V TA = 25°C, G = +20V/V, RG = 39.2Ω, and RL = 100Ω, unless otherwise noted. NONINVERTING SMALL-SIGNAL FREQUENCY RESPONSE 6 0 VO = 0.2VPP RL = 100Ω RG = RS = 50Ω RF Adjusted G = +12 3 Normalized Gain (dB) –3 G = +20 –6 G = +30 –9 G = +50 0 –3 –6 –9 G = –40 –12 –12 –15 1 10 100 1000 1 10 100 Frequency (MHz) NONINVERTING LARGE-SIGNAL FREQUENCY RESPONSE INVERTING LARGE-SIGNAL FREQUENCY RESPONSE 35 RG = 39.
PAGE 5
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.) TA = 25°C, G = +20V/V, RG = 39.2Ω, and RL = 100Ω, unless otherwise noted.
PAGE 6
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.) TA = 25°C, G = +20V/V, RG = 39.2Ω, and RL = 100Ω, unless otherwise noted. INPUT VOLTAGE AND CURRENT NOISE 2-TONE, 3RD-ORDER INTERMODULATION INTERCEPT 50 G = +20V/V 20dB to matched load. 45 2.7pA/√Hz Current Noise Intercept Point (+dBm) Voltage Noise (nV/√Hz) Current Voise (pA/√Hz) 10 1 0.85nV/√Hz Voltage Noise 40 35 50Ω PI 30 PO 50Ω OPA847 50Ω 750Ω 25 39.
PAGE 7
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.) TA = 25°C, G = +20V/V, RG = 39.2Ω, and RL = 100Ω, unless otherwise noted.
PAGE 8
TYPICAL CHARACTERISTICS: VS = ±5V (Cont.) TA = 25°C, G = +20V/V, RG = 39.2Ω, and RL = 100Ω, unless otherwise noted. PHOTODIODE TRANSIMPEDANCE FREQUENCY RESPONSE SETTLING TIME 0.25 0.15 Transimpedance Gain (dBΩ) 0.10 0.05 0 –0.05 –0.10 –0.15 –0.20 RF = 20kΩ CF Adjusted 86 83 80 0.01µF 77 20kΩ IO CF CDIODE [CD] 74 5 10 15 20 25 30 35 1 40 10 TYPICAL DC DRIFT OVER TEMPERATURE SUPPLY AND OUTPUT CURRENT vs TEMPERATURE 0.2 100 12.5 VIO 0 0 –0.1 –12.5 Ib –0.
PAGE 9
TYPICAL CHARACTERISTICS: VS = ±5V TA = 25°C, GD = 40V/V, RG = 50Ω, and RL = 400Ω, unless otherwise noted.
PAGE 10
APPLICATIONS INFORMATION WIDEBAND, NONINVERTING OPERATION The OPA847 provides a unique combination of a very low input voltage noise along with a very low distortion output stage to give one of the highest dynamic range op amps available. Its very high gain bandwidth product (GBP) can be used to either deliver high signal bandwidths at high gains, or to deliver very low distortion signals at moderate frequencies and lower gains.
PAGE 11
WIDEBAND, HIGH SENSITIVITY, TRANSIMPEDANCE DESIGN Equation 2 gives the approximate –3dB bandwidth that results if CF is set using Equation 1. The high GBP and low input voltage and current noise for the OPA847 make it an ideal wideband transimpedance amplifier for low to moderate transimpedance gains. Very high transimpedance gains (> 100kΩ) will benefit from the low input noise current of a JFET input op amp such as the OPA657.
PAGE 12
Even with bias current cancellation, the output DC errors are dominated in this example by the offset current term. Improved output DC precision and drift are possible, particularly at higher transimpedance gains, using the JFET input OPA657. The JFET input removes the input bias current from the error equation (eliminating the need for the resistor to ground on the noninverting input), leaving only the input offset voltage and drift as an output DC error term.
PAGE 13
Finally, since CS and CF set the high-frequency noise gain, determine CS using Equation 6 (solving for CS by using NG2 = 24): CS = (NG2 − 1)CF LOW GAIN INVERTING BANDWIDTH 1 (6) 0 Normalized Gain (1dB) which gives CS = 40.6pF. Both of these calculated values have been reduced slightly in Figure 5 to account for parasitics. The resulting closedloop bandwidth is approximately equal to Equation 7. f –3dB ≅ ZO • GBP (7) For the values shown in Figure 5, f–3dB is approximately 131MHz.
PAGE 14
This circuit uses two stages of forward gain with an overall feedback loop to set the input impedance match. The input transformer provides both a noiseless voltage gain and a signal inversion to retain an overall noninverting signal path from PI to PO. The second amplifier stage is inverting to provide the correct feedback polarity through the 6.19kΩ resistor. To achieve a 50Ω input match at the primary of the 1:2 transformer, the secondary must see a 200Ω load impedance.
PAGE 15
Harmonic Distortion (dBc) –65 supply of +5V and up to a single supply of +12V. If shutdown is desired for single-supply operation, it is important to realize that the shutdown pin is referenced from the positive supply pin. Open collector (drain) interfaces are suggested for single-supply operation above +5V. GD = 40V/V RL = 400Ω VO = 4VPP –75 2nd-Harmonic –85 DESIGN-IN TOOLS –95 DEMONSTRATION FIXTURES 3rd-Harmonic –105 –115 1 10 100 Frequency (MHz) FIGURE 10.
PAGE 16
ENI EO OPA847 RS IBN ERS RF √4kTRS IBI RG 4kT RG √4kTRF 4kT = 1.6E – 20J at 290°K FIGURE 12. Op Amp Noise Analysis Model. root to get back to a spot noise voltage. Equation 9 shows the general form for this output noise voltage using the terms illustrated in Figure 11.
PAGE 17
The OPA847 has an extremely low 3rd-order harmonic distortion. This also gives a high 2-tone 3rd-order intermodulation intercept, as shown in the Typical Characteristics. This intercept curve is defined at the 50Ω load when driven through a 50Ω matching resistor to allow direct comparisons to RF devices. This matching network attenuates the voltage swing from the output pin to the load by 6dB.
PAGE 18
The total output offset voltage can be considerably reduced by matching the source impedances looking out of the two inputs. For example, one way to add bias current cancellation to the circuit of Figure 1 is to insert a 12.1Ω series resistor into the noninverting input from the 50Ω terminating resistor. When the 50Ω source resistor is DC-coupled, this increases the source impedance for the noninverting input bias current to 37.1Ω.
PAGE 19
The shutdown feature for the OPA847 is a positive-supply referenced, current-controlled interface. Open-collector (or drain) interfaces are most effective, as long as the controlling logic can sustain the resulting voltage (in open mode) that appears at the V DIS pin. The V DIS pin voltage is one diode below the positive supply voltage applied to the OPA847 if the logic voltage is open.
PAGE 20
capacitive loads (< 4pF) may not need an RS, since the OPA847 is nominally compensated to operate with a 2pF parasitic load. Higher parasitic capacitive loads without an RS are allowed as the signal gain increases from +20V/V (increasing the unloaded phase margin).
PAGE 21
Revision History DATE REVISION PAGE 12/08 E 2 4/06 D 15 SECTION DESCRIPTION Absolute Maximum Ratings Changed minimum Storage Temperature Range from −40°C to −65°C. Design-In Tools Board part number changed. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. OPA847 SBOS251E www.ti.
PAGE 22
PACKAGE OPTION ADDENDUM www.ti.
PAGE 23
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) OPA847IDBVR SOT-23 DBV 6 3000 180.0 OPA847IDBVT SOT-23 DBV 6 250 OPA847IDR SOIC D 8 2500 B0 (mm) K0 (mm) P1 (mm) 8.4 3.2 3.1 1.39 4.0 180.0 8.4 3.2 3.1 1.39 330.0 12.4 6.4 5.2 2.1 Pack Materials-Page 1 W Pin1 (mm) Quadrant 8.0 Q3 4.0 8.0 Q3 8.0 12.
PAGE 25
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA847IDBVR SOT-23 DBV 6 3000 210.0 185.0 35.0 OPA847IDBVT SOT-23 DBV 6 250 210.0 185.0 35.0 OPA847IDR SOIC D 8 2500 367.0 367.0 35.
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