Datasheet

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FEATURES

DB, DBQ, DGV, DW, OR PW PACKAGE

(TOP VIEW)

INT

P00

P01

P02

P03

P04

P05

P06

P07

GND

SDA

SCL

P17

P16

P15

P14

P13

P12

P11

P10

24 23 22 21 20

7 8 9 10 11

RGE PACKAGE

(TOP VIEW)

INT

P10

P11

SDA

P06

P07

GND

SCL

P12

P00

P01

P02

P03

P04

P05

P17

P16

P15

P14

P13

P17

P16

P15

P14

P13

24 22 21

20 19

SCL

7 9 10 11 128

P00

P01

P02

P03

P04

P05

P10

P11

P06

P07

P12

GND

RTW PACKAGE

(TOP VIEW)

INT

DESCRIPTION/ORDERING INFORMATION

PCA9535

www.ti.com

........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008

REMOTE 16-BIT I

C AND SMBus LOW-POWER I/O EXPANDER

WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

• Low Standby-Current Consumption of • Polarity Inversion Register

1 µ A Max

• Latched Outputs With High-Current Drive

• I

C to Parallel Port Expander Capability for Directly Driving LEDs

• Open-Drain Active-Low Interrupt Output • Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• 5-V Tolerant I/O Ports

• ESD Protection Exceeds JESD 22

• Compatible With Most Microcontrollers

– 2000-V Human-Body Model (A114-A)

• 400-kHz Fast I

C Bus

– 1000-V Charged-Device Model (C101)

• Address by Three Hardware Address Pins for

Use of up to Eight Devices

This 16-bit I/O expander for the two-line bidirectional bus (I

C) is designed for 2.3-V to 5.5-V V

operation. It

provides general-purpose remote I/O expansion for most microcontroller families via the I

C interface [serial clock

(SCL), serial data (SDA)].

The PCA9535 consists of two 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity

Inversion (active-high or active-low operation) registers. At power on, the I/Os are configured as inputs. The

system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for

each input or output is kept in the corresponding Input or Output Port register. The polarity of the Input Port

The system master can reset the PCA9535 in the event of a timeout or other improper operation by utilizing the

power-on reset feature, which puts the registers in their default state and initializes the I

C/SMBus state machine.

The PCA9535 open-drain interrupt ( INT) output is activated when any input state differs from its corresponding

Input Port register state and is used to indicate to the system master that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the

remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via

the I

C bus. Thus, the PCA9535 can remain a simple slave device.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (40 pages)

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PCA9535 www.ti.com...........................................................................................................................................................
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low current consumption. Although pin-to-pin and I2C address compatible with the PCF8575, software changes are required due to the enhancements.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 TERMINAL FUNCTIONS NO. SOIC (D), SSOP (DB), QSOP (DBQ), TSSOP (PW), AND TVSOP (DGV) QFN (RGE AND RTW) NAME 1 22 INT Interrupt output. Connect to VCC through a pullup resistor. 2 23 A1 Address input. Connect directly to VCC or ground. 3 24 A2 Address input.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) INT A0 A1 A2 SCL SDA PCA9535 1 Interrupt Logic LP Filter 21 2 P07−P00 3 22 23 Input Filter I2C Bus Control Shift Register 16 Bits I/O Port P17−P10 Write Pulse VCC GND 4 Read Pulse 24 12 Power-On Reset A.
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PCA9535 www.ti.com...........................................................................................................................................................
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com I2C Interface The bidirectional I2C bus consists of the serial clock (SCL) and serial data (SDA) lines. Both lines must be connected to a positive supply via a pullup resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 Data Output by Transmitter NACK Data Output by Receiver ACK SCL From Master 1 2 8 9 S Clock Pulse for Acknowledgment Start Condition Figure 3.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com Device Address Figure 4 shows the address byte of the PCA9535. R/W Slave Address 0 1 0 0 Fixed A2 A1 A0 Programmable Figure 4.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 Register Descriptions The Input Port registers (registers 0 and 1) reflect the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by the Configuration Register. It only acts on read operation. Writes to these registers have no effect.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com Interrupt (INT) Output An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time, tiv, the signal INT is valid.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 Reads The bus master first must send the PCA9535 address with the least-significant bit set to a logic 0 (see Figure 4 for device address). The command byte is sent after the address and determines which register is accessed.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com 1 SCL 2 3 4 5 6 7 8 9 I0.x SDA S 0 1 0 0 A2 A1 1 A0 A R/W 7 6 5 4 3 I1.x 2 1 0 A 7 6 5 4 I0.x 3 2 1 0 Acknowledge From Master Acknowledge From Slave A 7 6 5 4 3 I1.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6 V VI Input voltage range (2) –0.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK Input diode clamp voltage II = –18 mA VPOR Power-on reset voltage VI = VCC or GND, IO = 0 VCC MIN 2.3 V to 5.5 V –1.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 I2C INTERFACE TIMING REQUIREMENTS over recommended operating free-air temperature range (unless otherwise noted) (see Figure 11) fscl I2C clock frequency tsch I2C clock high time MIN MAX UNIT 0 400 kHz µs 0.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C (unless otherwise noted) I/O SINK CURRENT vs OUTPUT LOW VOLTAGE I/O SINK CURRENT vs OUTPUT LOW VOLTAGE 30 50 40 V CC = 3.3 V V CC = 2.5 V TA = –40°C 20 TA = 25°C 15 10 TA = 125°C 25 TA = 25°C 20 15 10 TA = 125°C 5 5 0.0 0.1 0.2 0.3 0.
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PCA9535 www.ti.com...........................................................................................................................................................
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) VCC RL = 4.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 PARAMETER MEASUREMENT INFORMATION (continued) Pn 500 W DUT CL = 50 pF (see Note A) 2 × VCC 500 W P-PORT LOAD CONFIGURATION SCL 0.7 × VCC P0 A P3 0.3 × VCC Slave ACK ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ SDA Pn tpv (see Note B) Unstable Data Last Stable Bit WRITE MODE (R/W = 0) SCL 0.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) VCC Pn RL = 1 kΩ DUT 500 W 2 × VCC DUT SDA CL = 50 pF (see Note A) 500 W CL = 50 pF (see Note A) P-PORT LOAD CONFIGURATION SDA LOAD CONFIGURATION Start SCL ACK or Read Cycle SDA 0.
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PCA9535 www.ti.com........................................................................................................................................................... SCPS129I – AUGUST 2005 – REVISED MAY 2008 APPLICATION INFORMATION Figure 15 shows an application in which the PCA9535 can be used. Subsystem 1 (e.g., Temperature Sensor) INT VCC (5 V) Master Controller SCL SDA INT 22 23 1 VDD P00 SCL P01 SDA P02 INT P03 GND Subsystem 2 (e.g.
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PCA9535 SCPS129I – AUGUST 2005 – REVISED MAY 2008........................................................................................................................................................... www.ti.com Minimizing ICC When I/O Is Used to Control LED When an I/O is used to control an LED, normally it is connected to VCC through a resistor as shown in Figure 15. Because the LED acts as a diode, when the LED is off, the I/O VIN is about 1.2 V less than VCC.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 28-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device PCA9535DBQR Package Package Pins Type Drawing SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DBQ 24 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 PCA9535DBR SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 PCA9535DGVR TVSOP DGV 24 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 28-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCA9535DBQR SSOP DBQ 24 2500 367.0 367.0 38.0 PCA9535DBR SSOP DB 24 2000 367.0 367.0 38.0 PCA9535DGVR TVSOP DGV 24 2000 367.0 367.0 35.0 PCA9535DWR SOIC DW 24 2000 367.0 367.0 45.0 PCA9535PWR TSSOP PW 24 2000 367.0 367.0 38.0 PCA9535RGER VQFN RGE 24 3000 367.0 367.0 35.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.