Datasheet

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FEATURES

DPACKAGE

(TOP VIEW)

RESET

INT0

SD0

SC0

GND

SDA

SCL

INT

SC1

SD1

INT1

PWPACKAGE

(TOP VIEW)

RESET

INT0

SD0

SC0

GND

SDA

SCL

INT

SC1

SD1

INT1

DESCRIPTION/ORDERING INFORMATION

PCA9543A

TWO-CHANNEL I

C-BUS SWITCH

WITH INTERRUPT LOGIC AND RESET

SCPS169 – SEPTEMBER 2007

www.ti.com

• 1-of-2 Bidirectional Translating Switches • Supports Hot Insertion

• I

C Bus and SMBus Compatible • Low Standby Current

• Two Active-Low Interrupt Inputs • Operating Power-Supply Voltage Range of

2.3 V to 5.5 V

• Active-Low Interrupt Output

• 5-V Tolerant Inputs

• Active-Low Reset Input

• 0 to 400-kHz Clock Frequency

• Two Address Pins Allowing up to Four

Devices on the I

C Bus • Latch-Up Performance Exceeds 100 mA Per

JESD78

• Channel Selection Via I

C Bus, in Any

Combination • ESD Protection Exceeds JESD 22

• Power Up With All Switch Channels – 2000-V Human-Body Model (A114-A)

Deselected

– 200-V Machine Model (A115-A)

• Low r

Switches

– 1000-V Charged-Device Model (C101)

• Allows Voltage-Level Translation Between

1.8-V, 2.5-V, 3.3-V, and 5-V Buses

• No Glitch on Power Up

The PCA9543A is a bidirectional translating switch controlled by the I

C bus. The SCL/SDA upstream pair fans

out to two downstream pairs, or channels. Any individual SCn/SDn channel or combination of channels can be

selected, determined by the contents of the programmable control register. Two interrupt inputs ( INT0– INT1),

one for each of the downstream pairs, are provided. One interrupt output ( INT) acts as an AND of the two

interrupt inputs.

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

Tube of 50 PCA9543AD

SOIC – D PCA9543A

Reel of 2500 PCA9543ADR

– 40 ° C to 85 ° C

Tube of 90 PCA9543APW

TSSOP – PW PD543A

Reel of 2000 PCA9543APWR

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com .

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

PAGE 1
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.
PAGE 2
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.com SCPS169 – SEPTEMBER 2007 DESCRIPTION/ORDERING INFORMATION (CONTINUED) An active-low reset (RESET) input allows the PCA9543A to recover from a situation where one of the downstream I2C buses is stuck in a low state. Pulling RESET low resets the I2C state machine and causes all the channels to be deselected, as does the internal power-on reset function.
PAGE 3
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.com SCPS169 – SEPTEMBER 2007 BLOCK DIAGRAM SC0 6 PCA9543A 10 SC1 5 SD0 9 SD1 GND VCC RESET SCL 7 Switch Control Logic 14 3 Power-On Reset 1 12 2 I C Bus Control Input Filter SDA 13 INT0 4 8 INT1 Interrupt Logic 2 Output Filter 11 A0 A1 INT Figure 1. Block Diagram Device Address Following a start condition, the bus master must output the address of the slave it is accessing.
PAGE 4
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.com SCPS169 – SEPTEMBER 2007 Control Register Following the successful acknowledgement of the slave address, the bus master sends a byte to the PCA9543A, which is stored in the control register (see Figure 3). If multiple bytes are received by the PCA9543A, it saves the last byte received. This register can be written and read via the I2C bus.
PAGE 5
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.com SCPS169 – SEPTEMBER 2007 Table 2. Control Register Read (Interrupt) (1) (1) D7 D6 INT1 X X X X X 0 0 0 1 0 INT0 0 1 D3 D2 B1 B0 X X X X X X X X X 0 0 0 0 0 COMMAND No interrupt on channel 0 Interrupt on channel 0 No interrupt on channel 1 Interrupt on channel 1 No channel selected; power-up/reset default state Two interrupts can be active at the same time.
PAGE 6
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.com SCPS169 – SEPTEMBER 2007 I2C Interface The I2C bus is for two-way, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pullup resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy.
PAGE 7
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.com SCPS169 – SEPTEMBER 2007 When a slave receiver is addressed, it must generate an ACK after the reception of each byte. Also, a master must generate an ACK after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges must pull down the SDA line during the ACK clock pulse, so that the SDA line is stable low during the high pulse of the ACK-related clock period (see Figure 8).
PAGE 8
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.com SCPS169 – SEPTEMBER 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 7 V VI Input voltage range (2) –0.
PAGE 9
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.com SCPS169 – SEPTEMBER 2007 Electrical Characteristics (1) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VPOR Power-on reset voltage TEST CONDITIONS No load: VI = VCC or GND (2) TYP MAX VPOR VCC MIN 1.6 2.1 5V 3.6 4.5 V to 5.5 V Vpass Switch output voltage VSWin = VCC, ISWout = –100 μA 2.6 3.3 V 3 V to 3.6 V IOH INT VO = VCC 1.6 II VOL = 0.6 V INT VOL = 0.
PAGE 10
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.com SCPS169 – SEPTEMBER 2007 Electrical Characteristics (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SDA Cio(OFF) (3) SC1–SC0, SD1–SD0 ron Switch on-state resistance TEST CONDITIONS VCC VI = VCC or GND, Switch OFF 2.3 V to 5.5 V VO = 0.4 V, IO = 15 mA VO = 0.4 V, IO = 10 mA (3) MIN TYP MAX 11 13 6 8 4.5 V to 5.5 V 4 9 20 3 V to 3.6 V 5 11 25 2.
PAGE 11
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.com SCPS169 – SEPTEMBER 2007 Switching Characteristics over recommended operating free-air temperature range, CL ≤ 100 pF (unless otherwise noted) (see Figure 13) PARAMETER RON = 20 Ω, CL = 15 pF FROM (INPUT) TO (OUTPUT) SDA or SCL SDn or SCn MIN MAX UNIT 0.
PAGE 12
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.
PAGE 13
PCA9543A TWO-CHANNEL I C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET 2 www.ti.com SCPS169 – SEPTEMBER 2007 PARAMETER MEASUREMENT INFORMATION (continued) Figure 12. Reset Timing VCC RL = 4.7 kΩ DUT INT CL = 100 pF (See Note A) INTERRUPT LOAD CONFIGURATION INTn (input) 0.5 × VCC INTn (input) 0.5 × VCC tir tiv INT (output) 0.5 × VCC INT (output) VOLTAGE WAVEFORMS (tiv) 0.5 × VCC VOLTAGE WAVEFORMS (tir) A. CL includes probe and jig capacitance. B.
PAGE 14
PCA9543A TWO-CHANNEL I2C-BUS SWITCH WITH INTERRUPT LOGIC AND RESET www.ti.com SCPS169 – SEPTEMBER 2007 APPLICATION INFORMATION Figure 14 shows an application in which the PCA9543A can be used. VCC = 2.7 V to 5.5 V VCC = 3.3 V VCC = 2.7 V to 5.5 V See Note A VCC 12 SCL SDA 13 11 I2C/SMBus Master SCL SD0 SDA SC0 INT0 INT 5 6 Channel 0 4 3 RESET PCA9543A VCC = 2.7 V to 5.5 V See Note A 2 1 7 NOTE: A1 SD1 A0 GND SC1 9 10 8 Channel 1 INT1 A.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.com (4) 20-May-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device PCA9543APWR Package Package Pins Type Drawing TSSOP PW 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCA9543APWR TSSOP PW 14 2000 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.