Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) TSSOP 16

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FEATURES APPLICATIONS

DESCRIPTION

PCM1770 , PCM1771

SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007

LOW-VOLTAGE AND LOW-POWER STEREO AUDIO DIGITAL-TO-ANALOG CONVERTER

WITH HEADPHONE AMPLIFIER

• Portable Audio Player

• Multilevel DAC Including Headphone Amplifier

• Cellular Phone

• Analog Performance (V

, V

= 2.4 V):

• PDA

– Dynamic Range: 98 dB Typ

• Other Applications Requiring Low-Voltage

– THD+N at 0 dB: 0.1% Typ

Operation

– THD+N at –20 dB: 0.04% Typ

– Output Power at R

= 16 Ω : 13 mW

(Stereo), 26 mW (Monaural)

The PCM1770 and PCM1771 devices are CMOS,

• 1.6-V to 3.6-V Single Power Supply

monolithic, integrated circuits which include stereo

• Low Power Dissipation: 6.5 mW at V

, V

digital-to-analog converters, headphone circuitry, and

support circuitry in small TSSOP-16 and VQFN-20

2.4 V

packages.

• System Clock: 128 f

, 192 f

, 256 f

, 384 f

The data converters use TI's enhanced multilevel ∆ - Σ

• Sampling Frequency: 5 kHz to 50 kHz

architecture, which employs noise shaping and

• Software Control (PCM1770):

multilevel amplitude quantization to achieve excellent

– 16-, 20-, 24-Bit Word Available

dynamic performance and improved tolerance to

clock jitter. The PCM1770 and PCM1771 devices

– Left-, Right-Justified, and I

accept several industry standard audio data formats

– Slave/Master Selectable

with 16- to 24-bit data, left-justified, I

S, etc.,

– Digital Attenuation: 0 dB to –62 dB, 1

providing easy interfacing to audio DSP and decoder

dB/Step

devices. Sampling rates up to 50 kHz are supported.

A full set of user-programmable functions is

– 44.1-kHz Digital De-Emphasis

accessible through a 3-wire serial control port, which

– Zero Cross Attenuation

supports register write functions.

– Digital Soft Mute

– Monaural Analog-In With Mixing

– Monaural Speaker Mode

• Hardware Control (PCM1771):

– Left-Justified and I

– 44.1-kHz Digital De-Emphasis

– Monaural Analog-In With Mixing

• Pop-Noise-Free Circuit

• 3.3-V Tolerant

• Packages: TSSOP-16 and VQFN-20

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (39 pages)

PAGE 1
PCM1770, PCM1771 SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 LOW-VOLTAGE AND LOW-POWER STEREO AUDIO DIGITAL-TO-ANALOG CONVERTER WITH HEADPHONE AMPLIFIER FEATURES APPLICATIONS • • • • • • • • • • • • • • • Multilevel DAC Including Headphone Amplifier Analog Performance (VCC, VHP = 2.4 V): – Dynamic Range: 98 dB Typ – THD+N at 0 dB: 0.1% Typ – THD+N at –20 dB: 0.04% Typ – Output Power at RL = 16 Ω: 13 mW (Stereo), 26 mW (Monaural) 1.6-V to 3.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) PCM1770 PCM1771 Supply voltage: VCC, VHP –0.3 V to 4 V Supply voltage differences: VCC, VHP ±0.1 V Ground voltage differences ±0.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 ELECTRICAL CHARACTERISTICS all specifications at TA = 25°C, VCC = VHP = 2.4 V, fS = 44.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 ELECTRICAL CHARACTERISTICS (continued) all specifications at TA = 25°C, VCC = VHP = 2.4 V, fS = 44.1 kHz, system clock = 256 fS and 24-bit data, RL = 16 Ω, unless otherwise noted PARAMETER TEST CONDITIONS PCM1770PW, PCM1771PW, PCM1770RGA, PCM1771RGA MIN Frequency response at 20 kHz TYP UNIT MAX ±0.2 dB POWER SUPPLY REQUIREMENTS Voltage range, VCC, VHP ICC IHP Supply current 1.6 2.4 3.6 BPZ input 1.5 2.
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PCM1770, PCM1771 www.ti.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TERMINAL FUNCTIONS PCM1770PW TERMINAL NAME 6 NO. I/O DESCRIPTION AGND 5 – Analog ground. This is a return for VCC. AIN 10 I Monaural analog signal mixer input. The signal can be mixed with the outputs of the L- and R-channel DACs. BCK 3 I/O DATA 2 I Serial audio data input HGND 6 – Analog ground. This is a return for VHP.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TERMINAL FUNCTIONS (CONTINUED) PCM1770RGA TERMINAL NAME NO. I/O DESCRIPTION AGND 4 – Analog ground. This is a return for VCC. AIN 10 I Monaural analog signal mixer input. The signal can be mixed with the outputs of the L- and R-channel DACs. BCK 2 I/O DATA 1 I Serial audio data input HGND 5 – Analog ground. This is a return for VHP.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TERMINAL FUNCTIONS (CONTINUED) PCM1771PW TERMINAL NAME NO. I/O DESCRIPTION AGND 5 – Analog ground. This is a return for VCC. AIN 10 – Monaural analog signal mixer input. The signal can be mixed with the outputs of the L- and R-channel DACs. AMIX 14 I Analog mixing control BCK 3 I Serial bit clock. Clocks the individual bits of the audio data input, DATA.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 FUNCTIONAL BLOCK DIAGRAM AIN Digital Attenuator LRCK ×8 Digital Filter Audio Interface DATA Headphone Amplifier ∆Σ DAC + HOUTR BCK VCOM (FMT) MS ×8 Digital Filter SPI Port (AMIX) MC ∆Σ DAC + VCOM HOUTL (DEMP) MD Clock Manager Power Supply SCKI PD ( ) : PCM1771 AGND HGND VCC VHP B0001-02 TYPICAL PERFORMANCE CURVES All specifications at TA = 25°C, VCC = VHP 2.4 V, fS = 44.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VCC = VHP 2.4 V, fS = 44.1 kHz, system clock = 256 fS, 24-bit data, and RL = 16 Ω, unless otherwise noted. De-Emphasis Curves DE-EMPHASIS ERROR vs FREQUENCY 0 0.5 −1 0.4 −2 0.3 De-Emphasis Error – dB De-Emphasis Level – dB DE-EMPHASIS LEVEL vs FREQUENCY −3 −4 −5 −6 −7 0.1 0.0 −0.1 −0.2 −8 −0.3 −9 −0.4 −10 0.0 −0.5 0.1 0.2 0.3 0.4 0.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VCC = VHP 2.4 V, fS = 44.1 kHz, system clock = 256 fS, 24-bit data, and RL = 16 Ω, unless otherwise noted. CHANNEL SEPARATION vs SUPPLY VOLTAGE 104 78 102 76 Channel Separation – dB SNR – Signal-to-Noise Ratio − dB SIGNAL-TO-NOISE RATIO vs SUPPLY VOLTAGE 100 98 96 1.6 2.0 2.4 2.8 3.2 3.6 VCC – Supply Voltage – V 70 66 1.2 4.0 1.6 2.0 2.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VCC = VHP 2.4 V, fS = 44.1 kHz, system clock = 256 fS, 24-bit data, and RL = 16 Ω, unless otherwise noted.
PAGE 13
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VCC = VHP 2.4 V, fS = 44.1 kHz, system clock = 256 fS, 24-bit data, and RL = 16 Ω, unless otherwise noted. DYNAMIC RANGE vs JITTER 100 Dynamic Range – dB 99 98 97 96 95 94 0 100 200 300 400 500 600 700 Jitter – ps G015 Figure 15.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 DETAILED DESCRIPTION System Clock, Reset, and Functions System Clock Input The PCM1770 and PCM1771 devices require a system clock for operating the digital interpolation filters and multilevel ∆-Σ modulators. The system clock is applied at terminal 16 (SCKI). Table 1 shows examples of system clock frequencies for common audio sampling rates. Figure 18 shows the timing requirements for the system clock input.
PAGE 15
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Power On/Off Reset The PCM1770/71 always must have the PD pin set from LOW to HIGH once after power-supply voltages VCC and VHP have reached the specified voltage range and stable clocks SCKI, BCK, and LRCK are being supplied for the power-on sequence. A minimum time of 1 ms after both the clock and power-supply requirements are met is required before the PD pin changes from LOW to HIGH, as shown in Figure 19.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Power-Up/-Down Sequence and Reset The PCM1770 device has two kinds of power-up/-down methods: the PD terminal through hardware control and PWRD (register 4, B0) through software control. The PCM1771 device has only the PD terminal through hardware control for the power-up/-down sequence. The power-up or power-down sequence operates the same as the power-on or power-off sequence.
PAGE 17
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Audio Serial Interface The audio serial interface for the PCM1770 and PCM1771 devices consists of a 3-wire synchronous serial port. It includes terminals 1 (LRCK), 2 (DATA), and 3 (BCK). BCK is the serial audio bit clock, and it clocks the serial data present on DATA into the audio interface serial shift register. Serial data is clocked into the PCM1770 and PCM1771 devices on the rising edge of BCK.
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PCM1770, PCM1771 www.ti.
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PCM1770, PCM1771 www.ti.
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PCM1770, PCM1771 www.ti.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Hardware Control (PCM1771) The digital functions of the PCM1771 device are capable of hardware control. Table 3 shows selectable formats, Table 4 shows de-emphasis control, and Table 5 shows analog mixing control. Table 3. Data Format Select FMT DATA FORMAT Low 16- to 24-bit, left-justified format High 16- to 24-bit, I2S format Table 4. De-Emphasis Control DEMP DE-EMPHASIS FUNCTION Low 44.1-kHz de-emphasis OFF High 44.
PAGE 22
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Software Control (PCM1770) The PCM1770 device has many programmable functions that can be controlled in the software-control mode. The functions are controlled by programming the internal registers using MS, MC, and MD. The software-control interface is a 3-wire serial port that operates asynchronously to the serial audio interface. The serial control interface is used to program the on-chip mode registers.
PAGE 23
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Control Interface Timing Requirements (PCM1770) Figure 27 shows a detailed timing diagram for the serial control interface. These timing parameters are critical for proper control port operation.
PAGE 24
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Mode Control Registers (PCM1770) User-Programmable Mode Controls The PCM1770 device has a number of user-programmable functions that can be accessed via mode control registers. The registers are programmed using the serial control interface, as discussed in the Software Control (PCM1770) section. Table 6 lists the available mode control functions, along with their reset default conditions and associated register index.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Register Definitions Register 01 B15 0 B14 IDX6 B13 IDX5 B12 IDX4 B11 IDX3 B10 IDX2 B9 IDX1 B8 IDX0 B7 MUTR B6 MUTL B5 ATL5 B4 ATL4 B3 ATL3 B2 ATL2 B1 ATL1 B0 ATL0 IDX[6:0]: 000 0001b MUTx: Soft Mute Control Where, x = L or R, corresponding to the headphone output HOUTL or HOUTR.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Register 03 B15 0 B14 IDX6 B13 IDX5 B12 IDX4 B11 IDX3 B10 IDX2 B9 IDX1 B8 IDX0 B7 OVER B6 RSV B5 RINV B4 AMIX B3 DEM B2 FMT2 B1 FMT1 B0 FMT0 IDX[6:0]: 000 0011b OVER: Oversampling Control Default value: 0 OVER = 0 128fS oversampling OVER = 1 192fS, 256fS, 384fS oversampling The OVER bit controls the oversampling rate of the ∆-Σ D/A converters.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Register 04 B15 0 B14 IDX6 B13 IDX5 B12 IDX4 B11 IDX3 B10 IDX2 B9 IDX1 B8 IDX0 B7 RSV B6 RSV B5 RSV B4 ZCAT B3 RSV B2 RSV B1 RSV B0 PWRD IDX[6:0]: 0000 0100b ZCAT: Zero Cross Attenuation Default value: 0 ZCAT = 0 Normal attenuation (default) ZCAT = 1 Zero cross attenuation This bit enables changing the signal level on zero crossing during attenuation control or muting.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Analog In/Out Headphone Output (Stereo) The PCM1770 and PCM1771 devices have two independent headphone amplifiers, and the amplifier outputs are provided at the HOUTL and HOUTR terminals. Because the capability of the headphone output is designed for driving a 16-Ω impedance headphone, less than a 16-Ω impedance headphone is not recommended.
PAGE 29
PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 APPLICATION INFORMATION Connection Diagrams Figure 29 shows the basic connection diagram with the necessary power supply bypassing and decoupling components. It is recommended that the component values shown in Figure 29 be used for all designs. The use of series resistors (22 Ω to 100 Ω) is recommended for the SCKI, LRCK, BCK, and DATA inputs.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 APPLICATION INFORMATION (continued) 1.6 V to 3.6 V Audio DSP Controller 10 µF 1 LRCK SCKI 16 2 DATA MS 15 3 BCK MC 14 4 PD MD 13 VCC 12 PCM1770 5 AGND 6 HGND VHP 11 7 VCOM AIN 10 8 HOUTR HOUTL 0.1 µF 10 µF 0.1 µF 10 µF Analog In 9 10 µF 220 µF 0.022 µF 16 Ω 220 µF Headphone RL = 16 Ω 0.022 µF 16 Ω S0008-01 Figure 29.
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PCM1770, PCM1771 www.ti.com SLES011E – SEPTEMBER 2001 – REVISED MARCH 2007 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from D Revision (April 2005) to E Revision .................................................................................................... Page • • Changed MCKI to SCKI..............................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 21-Mar-2013 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device PCM1770PWR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TSSOP PW 16 2000 330.0 17.4 6.8 5.4 1.6 8.0 16.0 Q1 PCM1770RGAR VQFN RGA 20 2000 330.0 13.4 4.4 4.4 1.3 8.0 12.0 Q1 PCM1771PWR TSSOP PW 16 2000 330.0 17.4 6.8 5.4 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM1770PWR TSSOP PW 16 2000 367.0 367.0 38.0 PCM1770RGAR VQFN RGA 20 2000 367.0 367.0 35.0 PCM1771PWR TSSOP PW 16 2000 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.