Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - DA converter (DAC) SSOP 16

 

  

FEATURES APPLICATIONS

DESCRIPTION

PCM1780 , PCM1781 , PCM1782

SLES132B – MARCH 2005 – REVISED AUGUST 2006

24-Bit, 192-kHz Sampling, Enhanced Multilevel, Delta-Sigma,

Audio Digital-to-Analog Converter

• A/V Receivers

• 24-Bit Resolution

• DVD Movie Players

• Analog Performance (V

= 5 V):

• DVD Add-On Cards For High-End PCs

– Dynamic Range: 106 dB

• DVD Audio Players

– SNR: 106 dB, Typical

• HDTV Receivers

– THD+N: 0.002%, Typical

• Car Audio Systems

– Full-Scale Output: 3.9 Vp-p, Typical

• Other Applications Requiring 24-Bit Audio

• 4×/8× Oversampling Digital Filter:

– Stop-Band Attenuation: –50 dB

– Pass-Band Ripple: ±0.04 dB

The PCM1780/81/82 is a CMOS, monolithic,

• Sampling Frequency: 5 kHz to 200 kHz

integrated circuit, which includes stereo

digital-to-analog converters and support circuitry in a

• System Clock: 128 f

, 192 f

, 256 f

, 384 f

small 16-lead SSOP package. The data converters

512 f

, 768 f

, 1152 f

With Autodetect

use TI’s enhanced multilevel delta-sigma architecture

• Software Control (PCM1780, PCM1782):

to achieve excellent dynamic performance and

– Accepts 16-, 18-, 20-, and 24-Bit Audio Data

improved tolerance to clock jitter. The

PCM1780/81/82 accepts industry standard audio

– Formats: Right-Justified, I

S, and

data formats with 16- to 24-bit data, providing easy

Left-Justified

interfacing to audio DSP and decoder chips.

– Digital Attenuation: Mode Selectable

Sampling rates up to 200 kHz are supported. The

• 0 dB to –63 dB, 0.5 dB/step

PCM1780/82 provides a full set of

user-programmable functions through a three-wire

• 0 dB to –100 dB, 1 dB/step

serial control port, which supports register write

– Digital De-Emphasis

functions. The PCM1781 provides a subset of

– Digital Filter Rolloff: Sharp or Slow

user-programmable functions through four control

pins.

– Soft Mute

– Zero Flags for Each Output

The PCM1780 is pin-compatible with the PCM1680

(8-channel DAC).

– Open-Drain Output Zero Flag (PCM1782)

• Hardware Control (PCM1781):

– I

S and 16-Bit Word, Right-Justified

– Digital De-Emphasis

– Soft Mute

– Zero Flag for L-, R-Channel Common

Output

• Power Supply: 5-V Single Supply

• Small, 16-Lead SSOP Package (150 mil)

• Pin-Compatible with PCM1680

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

System Two, Audio Precision are trademarks of Audio Precision, Inc.

All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (35 pages)

PAGE 1
PCM1780, PCM1781, PCM1782 SLES132B – MARCH 2005 – REVISED AUGUST 2006 24-Bit, 192-kHz Sampling, Enhanced Multilevel, Delta-Sigma, Audio Digital-to-Analog Converter FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • 24-Bit Resolution Analog Performance (VCC = 5 V): – Dynamic Range: 106 dB – SNR: 106 dB, Typical – THD+N: 0.002%, Typical – Full-Scale Output: 3.
PAGE 2
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUT/OUTPUT Logic family VIH TTL compatible 2 Input logic level VIL 0.
PAGE 4
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Filter Characteristics (Slow Rolloff, PCM1780/PCM1782) Pass band ±0.5 dB 0.198 fS Stop band 0.884 fS Pass-band ripple ±0.5 Stop-band attenuation Stop band = 0.
PAGE 5
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 DEVICE INFORMATION (continued) TERMINAL FUNCTIONS—PCM1780/PCM1782 TERMINAL I/O DESCRIPTION NAME NO.
PAGE 6
PCM1780, PCM1781, PCM1782 www.ti.
PAGE 7
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 TYPICAL PERFORMANCE CURVES All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data, unless otherwise noted Digital Filter (De-Emphasis Off) FREQUENCY RESPONSE (SHARP ROLLOFF) PASS-BAND FREQUENCY RESPONSE (SHARP ROLLOFF) 0.05 0 0.04 −20 0.03 0.02 Amplitude – dB Amplitude – dB −40 −60 −80 0.01 0.00 −0.01 −0.02 −100 −0.03 −120 −0.04 −0.05 0.
PAGE 8
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 TYPICAL PERFORMANCE CURVES (Continued) All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data, unless otherwise noted De-Emphasis Filter DE-EMPHASIS DE-EMPHASIS ERROR 0.5 0 fS = 32 kHz −1 0.3 De-Emphasis Error – dB −2 De-Emphasis Level – dB fS = 32 kHz 0.4 −3 −4 −5 −6 −7 0.2 0.1 0.0 −0.1 −0.2 −8 −0.3 −9 −0.4 −0.
PAGE 9
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 TYPICAL PERFORMANCE CURVES (Continued) All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data, unless otherwise noted DE-EMPHASIS DE-EMPHASIS ERROR 0.5 0 fS = 48 kHz −1 0.3 De-Emphasis Error – dB −2 De-Emphasis Level – dB fS = 48 kHz 0.4 −3 −4 −5 −6 −7 0.2 0.1 0.0 −0.1 −0.2 −8 −0.3 −9 −0.4 −0.
PAGE 10
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 TYPICAL PERFORMANCE CURVES (Continued) All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data, unless otherwise noted Analog Dynamic Performance Supply Voltage Characteristics THD+N vs SUPPLY VOLTAGE DYNAMIC RANGE vs SUPPLY VOLTAGE 0.01 THD+N − Total Harmonic Distortion + Noise − % 110 Dynamic Range – dB 108 104 102 100 98 0.001 4.50 4.75 5.00 5.
PAGE 11
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 TYPICAL PERFORMANCE CURVES (Continued) All specifications at TA = 25°C, VCC = 5 V, fS = 48 kHz, system clock = 512 fS, and 24-bit data, unless otherwise noted Temperature Characteristics THD+N vs TEMPERATURE DYNAMIC RANGE vs TEMPERATURE 0.01 THD+N − Total Harmonic Distortion + Noise − % 110 Dynamic Range – dB 108 104 102 100 98 0.001 −25 0 25 50 96 −25 75 TA − Free-Air Temperature − °C 25 50 Figure 16.
PAGE 12
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 SYSTEM CLOCK AND RESET FUNCTIONS System Clock Input The PCM1780/81/82 requires a system clock for operating the digital interpolation filters and multilevel delta-sigma modulators. The system clock is applied at the SCK input (pin 5). Table 1 shows examples of system clock frequencies for common audio sampling rates. Figure 20 shows the timing requirements for the system clock input.
PAGE 13
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 Power-On-Reset Functions The PCM1780/81/82 includes a power-on-reset function. Figure 21 shows the operation of this function. With the system clock active and VCC > 3 V (typical, 2.2 V to 3.7 V), the power-on-reset function is enabled. The initialization sequence requires 3072 system clocks from the time VCC > 3 V (typical, 2.2 V to 3.7 V).
PAGE 14
PCM1780, PCM1781, PCM1782 www.ti.
PAGE 15
PCM1780, PCM1781, PCM1782 www.ti.
PAGE 16
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 OVERSAMPLING RATE CONTROL The PCM1780/81/82 automatically controls the oversampling rate of the delta-sigma D/A converters with the system clock frequency. The oversampling rate is set to 64× oversampling with an 1152-fS, 768-fS, or 512-fS system clock, to 32× oversampling with a 384-fS or 256-fS system clock, or to 16× oversampling with a 192-fS or 128-fS system clock.
PAGE 17
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 SOFTWARE CONTROL (PCM1780/82) The PCM1780/82 has many programmable functions that can be controlled in the software control mode; the functions are controlled by programming the internal registers using MS, MC, and MD. The serial control interface is a 3-wire serial port which operates asynchronously to the audio serial interface. The serial control interface is used to program the on-chip mode registers.
PAGE 18
PCM1780, PCM1781, PCM1782 www.ti.
PAGE 19
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 MODE CONTROL REGISTERS (PCM1780/82) User-Programmable Mode Controls The PCM1780/82 includes a number of user-programmable functions, which are accessed via control registers. The registers are programmed using the serial control interface, which was previously discussed in the Software Control section of this data sheet.
PAGE 20
PCM1780, PCM1781, PCM1782 www.ti.
PAGE 21
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 B15 REGISTER 18 0 B14 B13 B12 B11 B10 B9 B8 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 B7 B6 B5 B4 B3 B2 B1 B0 SRST OVER RSV RSV RSV RSV MUT2 MUT1 NOTE: RSV indicates a reserved bit that should be set to 0. MUTx: Soft Mute Control Where x = 1 or 2, corresponding to the DAC output VOUTL (x = 1) and VOUTR (x = 2).
PAGE 22
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 B15 REGISTER 19 0 B14 B13 B12 B11 B10 B9 B8 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 B7 B6 B5 B4 B3 B2 B1 B0 RSV DMF1 DMF0 DM12 RSV RSV DAC2 DAC1 NOTE: RSV indicates a reserved bit that should be set to 0. DACx: DAC Operation Control Where x = 1 or 2, corresponding to the DAC output VOUTL (x = 1) or VOUTR (x = 2).
PAGE 23
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 B15 REGISTER 20 0 B14 B13 B12 B11 B10 B9 B8 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 B7 B6 B5 B4 B3 B2 B1 B0 RSV RSV FLT RSV RSV FMT2 FMT1 FMT0 NOTE: RSV indicates a reserved bit that should be set to 0.
PAGE 24
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 B15 REGISTER 22 0 B14 B13 B12 B11 B10 B9 B8 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 B7 B6 B5 B4 B3 B2 B1 B0 RSV RSV RSV RSV 0 AZRO ZREV DREV NOTE: RSV indicates a reserved bit that should be set to 0. DREV: Output Phase Select Default value: 0 DREV = 0 Normal output (default) DREV = 1 Inverted output The DREV bit allows the user to control the phase of the analog output signal.
PAGE 25
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 ANALOG OUTPUTS The PCM1780/81/82 includes two independent output channels, VOUTL and VOUTR. These are unbalanced outputs, each capable of driving 3.9 Vp-p typical into a 5-kΩ ac-coupled load. The internal output amplifiers for VOUTL and VOUTR are biased to the dc common voltage, equal to 0.5 VCC.
PAGE 26
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 APPLICATION INFORMATION Connection Diagrams A basic connection diagram is shown in Figure 28, with the necessary power supply bypassing and decoupling components. TI recommends using the component values shown in Figure 28 for all designs. The use of series resistors (22 Ω to 100 Ω) is recommended for the SCK, LRCK, BCK, and DATA inputs.
PAGE 27
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 APPLICATION INFORMATION (continued) Power Supplies and Grounding The PCM1780/81/82 requires a 5-V supply for VCC. Proper power supply bypassing is shown in Figure 28. The 0.1-µF ceramic capacitor and the 10-µF electrolytic capacitor are recommended.
PAGE 28
PCM1780, PCM1781, PCM1782 www.ti.com SLES132B – MARCH 2005 – REVISED AUGUST 2006 APPLICATION INFORMATION (continued) Digital Power +VD Analog Power DGND AGND +5VA +VS –VS VCC Digital Logic and Audio Processor Output Circuits PCM1780/81/82 Digital Ground AGND Digital Section Analog Ground Analog Section Return Path for Digital Signals B0031-01 Figure 30.
PAGE 29
PACKAGE OPTION ADDENDUM www.ti.
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PAGE 31
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant PCM1780DBQR SSOP DBQ 16 2000 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PCM1781DBQR SSOP DBQ 16 2000 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PCM1782DBQR SSOP DBQ 16 2000 330.0 12.4 6.4 5.2 2.1 8.0 12.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM1780DBQR SSOP DBQ 16 2000 367.0 367.0 35.0 PCM1781DBQR SSOP DBQ 16 2000 367.0 367.0 35.0 PCM1782DBQR SSOP DBQ 16 2000 367.0 367.0 35.
PAGE 33
PAGE 34
PAGE 35
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.