Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsData collecting ICsData acquisition IC - ADC 20 Bit SSOP 24

FEATURES APPLICATIONS

DESCRIPTION

Analog Input (L)

Analog Input (R)

Analog Front-End

Delta-Sigma

Modulator

Digital

Decimation

Filter

Serial Interface

and

Format Control

Digital Output

Mode/Format Control

System Clock

B0003-01

PCM1800

www.ti.com

............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008

SINGLE-ENDED ANALOG-INPUT 20-BIT STEREO ANALOG-TO-DIGITAL CONVERTER

• DVD Recorders

• Dual 20-Bit Monolithic Δ Σ ADC

• DVD Receivers

• Single-Ended Voltage Input

• AV Amplifier Receivers

• 64 × Oversampling Decimation Filter:

• Electric Musical Instruments

– Pass-Band Ripple: ± 0.05 dB

– Stop-Band Attenuation: – 65 dB

• High Performance:

The PCM1800 is a low-cost, single-chip stereo

– THD+N: – 88 dB (typical)

analog-to-digital converter (ADC) with single-ended

– SNR: 95 dB (typical)

analog voltage inputs. The PCM1800 uses a

delta-sigma modulator with 64 times oversampling,

– Dynamic Range: 95 dB (typical)

including a digital decimation filter and a serial

– Internal High-Pass Filter

interface which supports both master and slave

• PCM Audio Interface:

modes and four data formats. The PCM1800 is

suitable for a wide variety of cost-sensitive consumer

– Master/Slave Modes

applications where good performance is required.

– Four Data Formats

The PCM1800 is fabricated using a highly advanced

• Sampling Rate: 4 kHz to 48 kHz

CMOS process and is available in a small 24-pin

• System Clock: 256 f

, 384 f

, or 512 f

SSOP package.

• Single 5-V Power Supply

• Small 24-Pin SSOP Package

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 System Two, Audio Precision are trademarks of Audio Precision, Inc.

3 All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 SINGLE-ENDED ANALOG-INPUT 20-BIT STEREO ANALOG-TO-DIGITAL CONVERTER FEATURES APPLICATIONS • Dual 20-Bit Monolithic ΔΣ ADC • Single-Ended Voltage Input • 64× Oversampling Decimation Filter: – Pass-Band Ripple: ±0.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = 25°C, VDD = VCC = 5 V, slave mode, fS = 44.1 kHz, 20-bit input data, and SYSCLK = 384 fS, unless otherwise noted PARAMETER TEST CONDITIONS PCM1800E MIN TYP Pass band 0.454 fS Stop band 0.583 fS ±0.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ABSOLUTE MAXIMUM RATINGS Supply voltage: VDD, VCC –0.3 V to 6.5 V Supply voltage differences ±0.1 V GND voltage differences ±0.1 V Digital input voltage –0.3 V to (VDD + 0.3 V), < 6.5 V Analog input voltage –0.3 V to (VCC + 0.3 V), < 6.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ANALOG FRONT-END (Single Channel) CEXT 470 pF CINPL 22 1.0 µF + 1 CINNL 21 30 kΩ VINL − − 1 kΩ (+) + + 1 kΩ 2 4.7 µF (−) Delta-Sigma Modulator VREF1 + REFCOM VREF 3 4.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VDD = VCC = 5 V, slave mode, fS = 44.1 kHz, 20-bit input data, and SYSCLK = 384 fS, unless otherwise noted DYNAMIC RANGE AND SNR vs POWER SUPPLY −60 dB 0.006 2 0.004 1 −0.5 dB 4.50 4.75 5.00 5.25 5.50 SNR 94 92 92 4.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VDD = VCC = 5 V, slave mode, fS = 44.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com TYPICAL PERFORMANCE CURVES FOR INTERNAL FILTERS All specifications at TA = 25°C, VDD = VCC = 5 V, slave mode, fS = 44.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 TYPICAL PERFORMANCE CURVES FOR INTERNAL FILTERS (continued) All specifications at TA = 25°C, VDD = VCC = 5 V, slave mode, fS = 44.1 kHz, 20-bit input data, and SYSCLK = 384 fS, unless otherwise noted otherwise noted HIGH-PASS FILTER HIGH-PASS FILTER RESPONSE HIGH-PASS FILTER RESPONSE 0.2 0 −10 0.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com THEORY OF OPERATION The PCM1800 consists of a band-gap reference, two channels of a single-to-differential converter, a fully differential 5th-order delta-sigma modulator, a decimation filter (including digital high pass), and a serial interface circuit.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 Table 1. System Clock Frequencies SAMPLING RATE FREQUENCY (kHz) SYSTEM CLOCK FREQUENCY (MHz) 256 fs 384 fs 512 fs 32 8.1920 12.2880 16.3840 44.1 11.2896 16.9344 22.5792 48 12.2880 18.4320 24.5760 tCLKIH tCLKIL 2.0 V SYSCLK 0.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com t(RST) = 40 ns (min) RSTB Pulse Duration RSTB-Pin t(RST) Reset Reset Removal Internal Reset 1024 System Clock Periods System Clock T0015-01 Figure 21.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 Table 3. Data Format FORMAT NO. (1) FMT1 (1) FMT0 (1) DATA FORMAT 0 0 0 20-bit, left-justified 1 0 1 20-bit, I2S 2 1 0 16-bit, right-justified 3 1 1 20-bit, right-justified FMT1 and FMT0 must be stable when RSTB changes from LOW to HIGH.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 INTERFACE TIMING Figure 24 and Figure 25 illustrate the interface timing in slave mode and master mode, respectively. 1.4 V FSYNC t(FSSU) t(FSHD) t(LRCP) 1.4 V LRCK t(BCKL) t(BCKH) t(LRSU) t(LRHD) 1.4 V BCK t(CKDO) t(BCKP) t(LRDO) 0.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com t(FSYP) 0.5 VDD FSYNC t(CKFS) t(LRCP) 0.5 VDD LRCK t(BCKL) t(BCKH) t(CKLR) 0.5 VDD BCK t(CKDO) t(BCKP) t(LRDO) 0.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 Power ON RSTB ON Reset Release Reset Internal Reset Ready/Operation 18436/fS DOUT(1) Normal Data(2) Zero Data T0019-01 (1) In the master mode, FSYNC, BCK, and LRCK are outputs similar to DOUT. (2) The HPF transient response (exponentially attenuated signal from ±0.
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PCM1800 SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 ............................................................................................................................................... www.ti.com APPLICATION INFORMATION BOARD DESIGN AND LAYOUT CONSIDERATIONS VCC, VDD PINS The digital and analog power supply lines to the PCM1800 should be bypassed to the corresponding ground pins with both 0.
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PCM1800 www.ti.com ............................................................................................................................................... SBAS071B – OCTOBER 2000 – REVISED AUGUST 2008 TYPICAL CIRCUIT CONNECTION DIAGRAM Figure 28 is a typical circuit connection diagram for which the cutoff frequency of the input HPF is about 5 Hz. Signal Gnd Line In Left-Channel 1.0 µF(2) + 1 4.7 µF + 2 3 4.7 µF Line In Right-Channel 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device PCM1800E/2K Package Package Pins Type Drawing SSOP DB 24 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2000 330.0 17.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.5 8.6 2.4 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM1800E/2K SSOP DB 24 2000 336.6 336.6 28.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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