PCM3006 SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 16-Bit, Single-Ended Analog Input/Output Stereo Audio Codec FEATURES APPLICATIONS • • • • • • • • • • • • • • Monolithic 16-Bit ∆Σ ADC and DAC Stereo ADC: – Single-Ended Voltage Input – Antialiasing Filter – 64× Oversampling – High Performance • THD+N: –84 dB • SNR: 89 dB • Dynamic Range: 89 dB – Digital High-Pass Filter Stereo DAC: – Single-Ended Voltage Output – Analog Low-Pass Filter – 8× Oversampling Dig
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = 25°C, VDD = VCC = 3 V, fS = 44.1 kHz, SYSCLK = 384 fS, and 16-bit data, unless otherwise noted PARAMETER CONDITIONS HPF frequency response –3 dB PCM3006T MIN TYP MAX UNITS 0.019 fS mHz Voltage range 0.6 VCC Vp-p Center voltage 0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = 25°C, VDD = VCC = 3 V, fS = 44.1 kHz, SYSCLK = 384 fS, and 16-bit data, unless otherwise noted PARAMETER CONDITIONS PCM3006T MIN TYP MAX –25°C to 85°C 2.7 3 3.6 0°C to 70°C (7) 2.4 3 3.
PCM3006 www.ti.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 ABSOLUTE MAXIMUM RATINGS Supply voltage: VDD, VCC1, VCC2 –0.3 V to 6.5 V Supply voltage differences ±0.1 V GND voltage differences ±0.1 V Digital input voltage –0.3 V to VDD + 0.3 V, < 6.5 V Analog input voltage –0.3 to VCC1, VCC2 + 0.3 V, < 6.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, fSYSCLK = 384 fS, and fSIGNAL = 1 kHz, unless otherwise noted ADC SECTION 5 −0.5 dB 0.006 4 0.004 3 0 25 50 75 THD+N − Total Harm. Dist. + Noise at −0.5 dB − % SNR 88 88 84 −25 86 0 25 50 75 TA − Free-Air Temperature − °C G002 Figure 1. Figure 2. THD+N vs SUPPLY VOLTAGE DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE 6 −60 dB 0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, fSYSCLK = 384 fS, and fSIGNAL = 1 kHz, unless otherwise noted −60 dB 5 0.008 0.006 4 0.004 3 −0.5 dB 0.002 44.1 92 90 90 Dynamic Range 88 88 SNR 86 86 84 2 32 92 84 32 48 44.1 48 fS − Sampling Frequency − kHz fS − Sampling Frequency − kHz SNR − Signal-to-Noise Ratio − dB 6 Dynamic Range − dB 0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES (continued) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, fSYSCLK = 384 fS, and fSIGNAL = 1 kHz, unless otherwise noted DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE −60 dB 3 0.008 0.006 2 FS 0.004 1 0.002 2.1 2.4 2.7 3.0 3.3 3.6 96 96 94 94 Dynamic Range 92 92 SNR 90 88 2.1 0 3.9 90 2.4 2.7 3.0 3.3 3.6 88 3.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (ADCs) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, and fSYSCLK = 384 fS, unless otherwise noted DECIMATION FILTER OVERALL CHARACTERISTICS STOP-BAND ATTENUATION CHARACTERISTICS 0 0 −20 Amplitude − dB Amplitude − dB −50 −100 −40 −60 −150 −80 −200 0 8 16 24 Normalized Frequency [× fS Hz] −100 0.0 32 0.2 0.4 0.6 0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (ADCs) (continued) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, and fSYSCLK = 384 fS, unless otherwise noted HIGH-PASS FILTER HIGH-PASS FILTER RESPONSE HIGH-PASS FILTER RESPONSE 0 0.2 −10 0.0 −20 Amplitude − dB Amplitude − dB −30 −40 −50 −60 −70 −80 −0.2 −0.4 −0.6 −0.8 −90 −100 0.0 −1.0 0.1 0.2 0.3 0.4 Normalized Frequency [× fS/1000 Hz] 0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (DACs) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, and fSYSCLK = 384 fS, unless otherwise noted DIGITAL FILTER PASS-BAND RIPPLE CHARACTERISTICS (fS = 44.1 kHz) 0 0.00 −20 −0.20 −40 −0.40 Level − dB Level − dB OVERALL FREQUENCY CHARACTERISTICS (fS = 44.1 kHz) −60 −80 −0.60 −0.80 −100 −1.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (DACs) (continued) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, and fSYSCLK = 384 fS, unless otherwise noted DE-EMPHASIS ERROR (44.1 kHz) 0.6 −2 0.4 −4 0.2 Error − dB Level − dB DE-EMPHASIS FREQUENCY RESPONSE (44.1 kHz) 0 −6 0.0 −8 −0.2 −10 −0.4 −12 −0.6 0 5k 10k 15k 20k 25k 0 4999.8375 f − Frequency − Hz 9999.675 14999.5125 G025 G026 Figure 25.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (DACs) (continued) All specifications at TA = 25°C, VCC = VDD = 3 V, fS = 44.1 kHz, and fSYSCLK = 384 fS, unless otherwise noted ANALOG LOW-PASS FILTER INTERNAL ANALOG FILTER FREQUENCY RESPONSE (1 Hz–100 kHz) 20 0.15 0 0.10 −20 0.05 Level − dB Level − dB INTERNAL ANALOG FILTER FREQUENCY RESPONSE (1 Hz–10 MHz) −40 0.00 −60 −0.05 −80 −0.10 −100 −0.
PCM3006 www.ti.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 1.0 µF + 3 VINR 30 kΩ − − (+) + + (−) 21 4.7 µF VCOM Delta-Sigma Modulator + 4 4.7 µF VREF1 + 5 4.7 µF VREF2 + VREF S0011-03 Figure 31.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 APPLICATION INFORMATION PCM AUDIO INTERFACE The four-wire digital audio interface for the PCM3006 comprises LRCIN (pin 10), BCKIN (pin 11), DIN (pin 15), and DOUT (pin 12). The PCM3006 accepts 16-bit MSB-first, right-justified format for the DAC and 16-bit MSB-first, left-justified format for the ADC. The PCM3006 can accept 32, 48, or 64 bit clocks (BCKIN) in one clock of LRCIN.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 t(LRP) 0.5 VDD LRCIN t(BCL) t(BCH) t(LB) t(BL) 0.5 VDD BCKIN t(BCY) t(DIH) t(DIS) 0.5 VDD DIN t(BDO) t(LDO) 0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 t(SCKH) H 0.7 VDD SYSCLK 0.3 VDD L 1/256 fS, 1/384 fS, or 1/512 fS t(SCKL) T0005-05 System clock duration, HIGH t(SCKH) 12 ns (min) System clock duration, LOW t(SCKL) 12 ns (min) Figure 34. System Clock Timing RESET The PCM3006 has an internal power-on reset circuit, as well as an external forced reset. The internal power-on reset initializes (resets) when the supply voltage VDD > 2.2 V (typ).
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 t(RST) = 40 ns (min) PDAD = LOW and PDDA = LOW Pulse Duration PDAD and PDDA t(RST) Reset Reset Removal Internal Reset 1024 System Clock Periods System Clock T0015-03 Figure 36. External Forced-Reset Timing Reset Removal or Power Down Off Internal Reset or Power Down Reset Ready/Operation Power Down t(DACDLY1) (16384/fS) DAC VOUT GND VCOM (0.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 Resynchronization Synchronization Lost State of Synchronization Synchronous Asynchronous Synchronous t(DACDLY2) (32/fS) Within 1/fS DAC VOUT Normal Data VCOM Undefined Data (0.5 VCC) Normal Data t(ADCDLY2) (32/fS) ADC DOUT Normal Data Undefined Data Zero Data Normal Data(1) T0020-03 (1) The HPF transient response (exponentially attenuated signal from ±0.2% dc of FSR with 200-ms time constant) appears initially.
PCM3006 SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 www.ti.com APPLICATION AND LAYOUT CONSIDERATIONS POWER-SUPPLY BYPASSING The digital and analog power supply lines to the PCM3006 should be bypassed to the corresponding ground pins with both 0.1-µF ceramic and 10-µF tantalum capacitors as close to the device pins as possible.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 +3 V Analog VCC 0.1 µF and 10 µF(1) + Rch In PCM3006 1 µF(3) + 1 Lch In 4.7 µF(2) + 4.7 µF(2) + µF(3) + SYSCLK Audio Interface 1 VCC1 VCC2 24 2 VCC1 NC 23 3 VINR AGND 22 4 VREF1 VCOM 21 5 VREF2 VOUTR 20 4.7 µF(2) + 4.7 µF(4) + 4.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 THEORY OF OPERATION ADC SECTION The PCM3006 ADC consists of two reference circuits, a stereo single-to-differential converter, a fully differential 5-order delta-sigma modulator, a decimation filter (including digital high pass), and a serial interface circuit.
PCM3006 www.ti.com SBAS089A – OCTOBER 2000 – REVISED OCTOBER 2004 THEORY OF OPERATION (continued) In 8 fS 21-Bit + + − + Z−1 + − + + Z−1 + + Z−1 + 5-Level Quantizer 4 3 Out 64 fS 2 1 0 B0008-01 Figure 41. 5-Level ∆Σ Modulator Block Diagram 0 −10 −20 −30 −40 Gain − dB −50 −60 −70 −80 −90 −100 −110 −120 −130 −140 −150 0 5 10 15 20 25 30 f − Frequency − kHz G031 Figure 42.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE MATERIALS INFORMATION www.ti.com 8-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device PCM3006T/2K Package Package Pins Type Drawing SSOP DCV 24 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2000 330.0 17.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.1 8.5 1.75 12.0 16.
PACKAGE MATERIALS INFORMATION www.ti.com 8-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM3006T/2K SSOP DCV 24 2000 346.0 346.0 33.
MECHANICAL DATA MPSS001 – MARCH 2001 DCV (R-PSOP-G24) PLASTIC SMALL-OUTLINE D 0,30 0,19 13 0,65 24 0,10 M 6,00 MAX C 7,80 7,40 Gage Plane 0°-10° 0,25 REF Index Area 1 C 12 0,70 0,30 8,20 7,70 1,15 TYP 1,45 MAX A Seating Plane 0,15 0,05 0,10 A 0,16 0,09 0,20 0,09 With Plating 0,25 Base Metal E 0,19 0,30 0,19 Section A-A 4202107/A 03/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C.
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