Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsPCM3501E

1 PCM3501

FEATURES

● 16-BIT DELTA-SIGMA DAC AND ADC

● DIFFERENTIAL INPUT AND OUTPUT

● DESIGNED FOR MODEM ANALOG FRONT END:

Supports up to 56kbps Operation

● ANALOG PERFORMANCE:

Sampling Frequency: 7.2kHz to 26kHz

Dynamic Range: 88dB (typ) at f

= 8kHz, f

= 1kHz

● SYSTEM CLOCK: 512f

● MASTER OR SLAVE OPERATION

● ON-CHIP CRYSTAL OSCILLATOR CIRCUIT

● ADC-TO-DAC LOOP-BACK MODE

● TIME SLOT MODE SUPPORTS UP TO

FOUR CODECs ON A SINGLE SERIAL

INTERFACE

DESCRIPTION

The PCM3501 is a low cost, 16-bit CODEC designed

for modem Analog Front End (AFE) and speech pro-

cessing applications. The PCM3500’s low power op-

eration from +2.7V to +3.6V power supplies, along

with an integrated power-down mode, make it ideal for

portable applications.

The PCM3501 integrates all of the functions needed for

a modem or voice CODEC, including delta-sigma

PCM3501

Low Voltage, Low Power, 16-Bit, Mono

VOICE/MODEM CODEC

APPLICATIONS

● SOFTWARE MODEMS FOR:

Personal Digital Assistant

Notebook and Hand-Held PCs

Set-Top Box

Digital Television

Embedded Systems

● PORTABLE VOICE RECORDER/PLAYER

● SPEECH RECOGNITION/SYNTHESIS

● TELECONFERENCING PRODUCTS

digital-to-analog and analog-to-digital converters, in-

put anti-aliasing filter, digital high-pass filter for DC

blocking, and an output low-pass filter. The synchro-

nous serial interface provides for a simple, or glue-free

interface to popular DSP and RISC processors. The

serial interface also supports Time Division Multiplex-

ing (TDM), allowing up to four CODECs to share a

single 4-wire serial bus.

International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111

Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

● POWER-DOWN MODE: 60µA (typ)

● SINGLE +2.7V TO +3.6V POWER SUPPLY

● SMALL PACKAGE: 24-Lead SSOP

PCM3501

Interpolation

Digital Filter

Mode Control

Decimation

Digital Filter

Reference

AAF HPF

M/S

HPFD TSC

XTIXTOLOOP

REF

COM

REF

IN+

IN–

Serial I/O Interface

PDWN

Power

DGND

AGND V

Loop

BCK

DIN

DOUT

FSO

SCKIO

Clock

Gen/

OSC

∆Σ

Modulator

(ADC)

∆Σ

Modulator

SMF

OUT+

OUT–

Multi-Level

DAC

SBAS137

Summary of content (28 pages)

PAGE 1
PCM3501 ® PCM 350 1 Low Voltage, Low Power, 16-Bit, Mono VOICE/MODEM CODEC TM FEATURES ● 16-BIT DELTA-SIGMA DAC AND ADC ● DIFFERENTIAL INPUT AND OUTPUT ● DESIGNED FOR MODEM ANALOG FRONT END: Supports up to 56kbps Operation ● ANALOG PERFORMANCE: Sampling Frequency: 7.
PAGE 2
SPECIFICATIONS All specifications at TA = +25°C, VDD = VCC = 3.3V, fS = 8kHz, and nominal system clock (XTI) = 512fS, and differntial input and output mode, unless otherwise noted. Measurement band is 100Hz to 0.425fS.
PAGE 3
ABSOLUTE MAXIMUM RATINGS ELECTROSTATIC DISCHARGE SENSITIVITY Supply Voltage, +VDD, +VCC (1) .......................................................... +6.5V Supply Voltage Differences(2) ........................................................... ±0.1V GND Voltage Differences(3) ....................................................................................... ±0.1V Digital Input Voltage ................................................... –0.3V to VDD + 0.
PAGE 4
PIN CONFIGURATION Top View SSOP PCM3501 1 VCOM VCC 24 2 VREF1 AGND 23 3 VREF2 VOUT+ 22 4 VIN+ VOUT– 21 5 VIN– PDWN 20 6 M/S LOOP 19 7 TSC HPFD 18 8 BCK XTI 17 9 FS 10 DIN SCKIO 15 11 DOUT DGND 14 12 FSO XTO 16 VDD 13 PIN ASSIGNMENTS PIN NAME I/O 1 VCOM OUT DESCRIPTION 2 VREF1 — Decouple Pin for Reference Voltage 1 (0.99VCC). This pin should be connected to ground through a capacitor. 3 VREF2 — Decouple Pin for Reference Voltage 2 (0.2VCC).
PAGE 5
TYPICAL PERFORMANCE CURVES DAC SECTION DIGITAL FILTER INTERPOLATION FILTER PASSBAND RIPPLE CHARACTERISTICS INTERPOLATION FILTER FREQUENCY RESPONSE 0 0.2 –10 0.0 –30 Amplitude (dB) Amplitude (dB) –20 –40 –50 –60 –70 –80 –0.2 –0.4 –0.6 –0.8 –90 –100 1 0 –1.0 4 2 3 Normalized Frequency (• fS) 0 0.1 0.2 0.3 0.4 0.5 Normalized Frequency (• fS Hz) ANALOG FILTER OUTPUT FILTER FREQUENCY RESPONSE PASSBAND CHARACTERISTICS 0 0 –10 –0.1 –20 –0.2 –30 –0.3 –40 –0.
PAGE 6
TYPICAL PERFORMANCE CURVES (Cont.) TA = +25°C, VCC = VDD = +3.3V, fS = 8kHz, and fSIGNAL = 1kHz, unless otherwise specified.
PAGE 7
TYPICAL PERFORMANCE CURVES (Cont.) DAC SECTION DAC CHARACTERISTICS vs TEMPERATURE, SUPPLY, AND SAMPLING FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs TEMPERATURE (TA = –25°C to +85°C) DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO vs TEMPERATURE (TA = –25°C to +85°C) 100 Dynamic Range and SNR (dB) THD+N at –0dB (dB) –88 –90 –92 –94 –96 SNR 98 96 94 Dynamic Range 92 –50 –25 0 25 50 Temperature (°C) 75 100 –50 TOTAL HARMONIC DISTORTION + NOISE vs SUPPLY VOLTAGE (VCC = VDD = +2.7V to +3.
PAGE 8
TYPICAL PERFORMANCE CURVES ADC SECTION DIGITAL FILTER DECIMATION FILTER STOPBAND ATTENUATION CHARACTERISTICS 0 0 –20 –10 –40 –20 –60 –30 Amplitude (dB) Amplitude (dB) DECIMATION FILTER FREQUENCY RESPONSE –80 –100 –120 –140 –40 –50 –60 –70 –80 –160 –180 –90 –200 –100 0 8 16 24 0 32 0.2 0.4 0.6 0.8 Normalized Frequency (• fS Hz) Normalized Frequency (• fS Hz) DECIMATION FILTER PASSBAND RIPPLE CHARACTERISTICS DECIMATION FILTER TRANSITION BAND CHARACTERISTICS 1.0 0 0.
PAGE 9
TYPICAL PERFORMANCE CURVES (Cont.) TA = +25°C, VCC = VDD = +3.3V, fS = 8kHz, and fSIGNAL = 1kHz, unless otherwise specified. ADC SECTION ANALOG FILTER ANTI-ALIASING FILTER PASSBAND CHARACTERISTICS 0 0 –5 –0.1 –10 –0.2 –15 –0.3 Amplitude (dB) Amplitude (dB) ANTI-ALIASING FILTER STOPBAND CHARACTERISTICS –20 –25 –30 –35 –0.4 –0.5 –0.6 –0.7 –40 –0.8 –45 –0.9 –50 100 –1.
PAGE 10
TYPICAL PERFORMANCE CURVES (Cont.) TA = +25°C, VCC = VDD = +3.3V, fS = 8kHz, and fSIGNAL = 1kHz, unless otherwise specified. ADC SECTION ADC CHARACTERISTICS vs TEMPERATURE, SUPPLY AND SAMPLING FREQUENCY DYNAMIC RANGE AND SIGNAL-TO-NOISE RATIO vs TEMPERATURE (TA = –25°C to +85°C) TOTAL HARMONIC DISTORTION + NOISE vs TEMPERATURE (TA = –25°C to +85°C) 92 Dynamic Range and SNR (dB) THD+N at –0.
PAGE 11
TYPICAL PERFORMANCE CURVES (Cont.) TA = +25°C, VCC = VDD = +3.3V, fS = 8kHz, and fSIGNAL = 1kHz, unless otherwise specified. SUPPLY CURRENT vs SUPPLY VOLTAGE AND SAMPLING FREQUENCY ICC, IDD AND ICC + IDD vs SAMPLING FREQUENCY DIN = BPZ, VIN = BPZ 12 12 10 10 ICC, IDD and ICC + IDD (mA) ICC, IDD and ICC + IDD (mA) SUPPLY CURRENT vs SUPPLY VOLTAGE ICC + IDD 8 ICC 6 4 IDD ICC + IDD 8 ICC 6 IDD 4 2 2 ICC + IDD at Power Down 0 0 2.4 2.7 3.0 3.3 Supply Voltage (V) 3.6 3.
PAGE 12
SYSTEM CLOCK AND RESET/ POWER DOWN SAMPLING FREQUENCY (kHz) SYSTEM CLOCK FREQUENCY (MHz) 8 11.025 16 22.05 24 4.096 5.6448 8.192 11.2896 12.288 SYSTEM CLOCK INPUT AND OUTPUT The PCM3501 requires a system clock for operating the digital filters and delta-sigma data converters. TABLE I. System Clock Frequencies for Common Sampling Frequencies. The system clock may be supplied from an external master clock or generated using the on-chip crystal oscillator circuit.
PAGE 13
PDWN causes the reset initialization sequence to start. During the initialization sequence, the DAC output is forced to AGND, and the ADC output is forced to a high impedance state. After the initialization sequence has completed, the DAC and ADC outputs experience a delay before they output a valid signal or data. Refer to Figures 4 and 5 for external reset and post-reset delay timing. Reset and Power Down The PCM3501 supports power-on reset, external reset, and power-down operations.
PAGE 14
SERIAL INTERFACE anteed in Master Mode). Data for DIN is clocked into the serial interface on the rising edge of BCK, while data for DOUT is clocked out of the serial interface on the falling edge of BCK. The serial interface of the PCM3501 is a 4-wire synchronous serial port. It includes FS (pin 9), BCK (pin 8), DIN (pin 10) and DOUT (pin 11).
PAGE 15
tFSP tFSW FS (output) 0.5VDD tCKFS tBCKP BCK (output) 0.5VDD tBCKH tBCKL DIN (input) 0.5VDD tDIHD tDISU DOUT (output) 0.5VDD tCKDO NOTES: Timing measurement reference level is (VIH/VIL)/2. Rising and falling time is measured from 10% to 90% of IN/OUT signal swing. Load capacitance of DOUT, FS, BCK signal is 50pF.
PAGE 16
interface bus. This is useful for system applications that require multiple modem or voice channels. Figure 11 shows examples of Time Slot Mode connections. SYNCHRONIZATION REQUIREMENTS The PCM3501 requires that FS and BCK be synchronous with the system clock. Internal circuitry is included to detect a loss of synchronization between FS and the system clock input. If the phase relationship between FS and the system clock varies more than ± 1.5 BCK periods, the PCM3501 will detect a loss of synchronization.
PAGE 17
One Frame = 1/fS, 64 Bits per Frame, 16 Bits per Slot CODEC A CODEC B CODEC C CODEC D Slot 0, 16 Bits Slot 1, 16 Bits Slot 2, 16 Bits Slot 3, 16 Bits FS BCK FS (A) FSO (A) FS (B) FSO (B) FS (C) FSO (C) FS (D) FSO (D) DIN MSB LSB High Impedance DOUT (A) High Impedance DOUT (B) DOUT (C) High Impedance High Impedance High Impedance DOUT (D) FIGURE 12. Time Slot Mode Operation.
PAGE 18
Table III shows the TSC pin settings and corresponding mode selections. When Time Slot Mode is enabled, FSO (pin 12) is used as a frame sync output, which is connected to the FS input of the next PCM3501 in the Time Slot sequence. Figures 13 and 14 provide detailed timing for Time Slot Mode operation.
PAGE 19
tFSP tFSW FS (output) 0.5VDD tBCKP tCKFS BCK (output) 0.5VDD tBCKL tBCKH DIN (input) 0.5VDD tDIHD tDISU High Impedance High Impedance DOUT (output) 0.5VDD tHZDO tCKDO tDOHZ FSO (output) 0.5VDD tBFSO tFSOW NOTES: Timing measurement reference level is (VIH/VIL)/2. Rising and falling time is measured from 10% to 90% of IN/OUT signal swing. Load capacitance of DOUT, FSO, FS, and BCK signal is 50pF.
PAGE 20
APPLICATIONS INFORMATION unbuffered on pin 1 for decoupling. A 1µF to 10µF aluminum electrolytic or tantalum capacitor is recommended for decoupling purposes. This capacitor should be located as close as possible to pin 1. BASIC CIRCUIT CONNECTIONS The basic connection diagram for the PCM3501 is shown in Figure 16. Included are the required power supply bypass and reference decoupling capacitors. The DAC output, VOUT, and the ADC input, VIN, should be AC-coupled to external circuitry.
PAGE 21
VREF1 (pin 2) and VREF2 (pin 3) are reference voltages used by the delta-sigma modulators. They are brought out strictly for decoupling purposes. VREF1 and VREF2 are not to be used to bias external circuits. A 1µF to 10µF aluminum electrolytic or tantalum capacitor is recommended for decoupling on each pin. These capacitors should be located as close as possible to pins 2 and 3. by a split ground plane, with the PCM3501 positioned entirely over the analog section of the board.
PAGE 22
OUTPUT FILTER CIRCUITS FOR THE DAC noise requirements for a particular system. Generally, a 2ndorder or better low-pass circuit will be required, with the cut-off frequency set to fS/2 or less. The PCM3501’s DAC uses delta-sigma conversion techniques. It uses oversampling and noise shaping to improve in-band (f = fS/2) signal-to-noise performance at the expense of increased out-of-band noise. The DAC output must be low-pass filtered to attenuate the out-of-band noise to a reasonable level.
PAGE 23
THEORY OF OPERATION The AFE circuit consists of a buffer/filter for each input of the converter. The frequency response for the filter is shown in Figure 22. Since the delta-sigma modulator oversamples the input at 64fS, the anti-alias filter requirements are relaxed, with only a single-pole filter being required. If an application requires further band limiting of the input signal, a simple RC filter at the inputs can be used, as shown in Figure 23.
PAGE 24
shaper consists of five integrators which use a switchedcapacitor topology, a comparator, and a feedback loop consisting of a one-bit DAC. The delta-sigma modulator shapes the quantization noise, shifting it out of the audio band in the frequency domain. The high order of the modulator enables it to randomize the modulator outputs, reducing idle tone levels. DAC SECTION The delta-sigma DAC section of PCM3501 is based on a 5level amplitude quantizer and a 3rd-order noise shaper.
PAGE 25
PACKAGE OPTION ADDENDUM www.ti.
PAGE 26
PACKAGE MATERIALS INFORMATION www.ti.com 13-Jun-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device PCM3501E/2K Package Package Pins Type Drawing SSOP DB 24 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2000 330.0 17.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.5 8.6 2.4 12.0 16.
PAGE 27
PACKAGE MATERIALS INFORMATION www.ti.com 13-Jun-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PCM3501E/2K SSOP DB 24 2000 336.6 336.6 28.
PAGE 28
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