Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Op-amp Programmable gain SOIC 8

PGA103

Programmable Gain

AMPLIFIER

FEATURES

● DIGITALLY PROGRAMABLE GAINS:

G=1, 10, 100V/V

● CMOS/TTL-COMPATIBLE INPUTS

● LOW GAIN ERROR:

±0.05% max, G=10

● LOW OFFSET VOLTAGE DRIFT: 2µV/

°C

● LOW QUIESCENT CURRENT: 2.6mA

● LOW COST

● 8-PIN PLASTIC DIP, SO-8 PACKAGES

APPLICATIONS

● DATA ACQUISITION SYSTEMS

● GENERAL PURPOSE ANALOG BOARDS

● MEDICAL INSTRUMENTATION

DESCRIPTION

The PGA103 is a programmable-gain amplifier for

general purpose applications. Gains of 1, 10, or 100 are

digitally selected by two CMOS/TTL-compatible in-

puts. The PGA103 is ideal for systems that must

handle wide dynamic range signals.

The PGA103’s high speed circuitry provides fast set-

tling time, even at G=100 (8µs to 0.01%). Bandwidth

is 250kHz at G=100, yet quiescent current is only

2.6mA. It operates from ±4.5V to ±18V power

supplies.

The PGA103 is available in 8-pin plastic DIP and

SO-8 surface-mount packages, specified for the –40°C

to +85°C temperature range.

PGA103

V+ V–

1

10

100

0

1

GAIN A

= G • V

International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706

Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

1993 Burr-Brown Corporation PDS-1208B Printed in U.S.A. November, 1993

SBOS031

Summary of content (9 pages)

PAGE 1
® PGA103 Programmable Gain AMPLIFIER FEATURES DESCRIPTION ● DIGITALLY PROGRAMABLE GAINS: G=1, 10, 100V/V The PGA103 is a programmable-gain amplifier for general purpose applications. Gains of 1, 10, or 100 are digitally selected by two CMOS/TTL-compatible inputs. The PGA103 is ideal for systems that must handle wide dynamic range signals. ● CMOS/TTL-COMPATIBLE INPUTS ● LOW GAIN ERROR: ±0.
PAGE 2
SPECIFICATIONS ELECTRICAL TA = +25°C, VS = ±15V, RL = 2kΩ unless otherwise specified. PGA103P, U PARAMETER CONDITIONS INPUT Offset Voltage, RTI G=1 G = 10 G = 100 vs Temperature G=1 G = 10 G = 100 vs Power Supply G=1 G = 10 G = 100 Impedance MIN TA = +25°C TA = TMIN to TMAX VS = ±4.
PAGE 3
SPECIFICATIONS (CONT) ELECTRICAL TA = +25°C, VS = ±15V, RL = 2kΩ unless otherwise specified. PGA103P, U PARAMETER CONDITIONS POWER SUPPLY Voltage Range Current MIN TYP MAX UNITS ±4.5 ±15 ±2.6 ±18 ±3.5 V mA +85 +125 °C °C °C/W VIN = 0V TEMPERATURE RANGE Specification Operating θJA: P or U Package –40 –40 100 PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Top View Supply Voltage ................................................................................. ±18V Analog Input Voltage Range ...
PAGE 4
DICE INFORMATION NC 6 NC NC NC NC 7 4C FUNCTION 1 2 3A, 3B, 3C(1) 4A, 4B, 4C(2) 6 7 8 A0 A1 Ground VIN V– VO V+ NC: No Connection NOTES: (1) Connect all three indicated pads. (2) Connect all three indicated pads. Substrate Bias: Internally connected to V– power supply. 8 1 2 PAD MECHANICAL INFORMATION 3A 3B 3C 4A 4B MILS (0.001") MILLIMETERS 69 x 105 ±5 20 ±3 4x4 1.75 x 2.67 ±0.13 0.51 ±0.08 0.1 x 0.1 Die Size Die Thickness Min.
PAGE 5
TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VS = ±15V unless otherwise noted. 100 100 Current Noise (pA/√Hz) Voltage Noise (nV/√Hz) INPUT CURRENT NOISE vs FREQUENCY INPUT VOLTAGE NOISE vs FREQUENCY 1000 G=1 G=10 G=100 10 Bandwidth Limited 10 1 All Gains 0.
PAGE 6
APPLICATION INFORMATION Some applications select gain of the PGA103 with switches or jumpers. Figure 2 shows pull-up resistors connected to assure a noise-free logic “1” when the switch or jumper is off or open. Fixed-gain applications can connect the logic inputs directly to V+ or ground (or other valid logic level) without a series resistor. Figure 1 shows the basic connections required for operation of the PGA103.
PAGE 7
+15V –15V V+ V– V+ V – G1 = 1, 2, 4, 8 VIN– 8 4 PGA205 VIN+ G2 = 1, 10, 100 6 PGA103 A0 3 A1 1 7 102kΩ VO G = 0.1, 1, 10 D2 D1 PGA103 A0 VIN G = G 1 • G2 VO A1 Accepts inputs to ±120V. 2 True instrumentation amplifier input. 11.3kΩ D1, D2; IN4148 A1 GAIN 1 2 4 8 10 20 40 80 100 200 400 800 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 A0 FIGURE 5. Wide Input Voltage Range Amplifer. FIGURE 4.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.