Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Custom audio Car stereo, Musical instruments, Professional audio SPI SOIC 16

FEATURES

D DIGITALLY-CONTROLLED ANALOG VOLUME

CONTROL:

Two Independent Audio Channels

Serial Control Interface

Zero Crossing Detection

Mute Function

D WIDE GAIN AND ATTENUATION RANGE:

+31.5dB to −95.5dB with 0.5dB Steps

D LOW NOISE AND DISTORTION:

120dB Dynamic Range

0.0003% THD+N at 1kHz

D LOW INTERCHANNEL CROSSTALK:

−126dBFS

D NOISE-FREE LEVEL TRANSITIONS

D POWER SUPPLIES: +15V Analog, +5V Digital

D AVAILABLE IN SOL−16 PACKAGE

D PIN-FOR-PIN COMPATIBLE WITH THE

PGA2310

APPLICATIONS

D AUDIO AMPLIFIERS

D MIXING CONSOLES

D MULTI-TRACK RECORDERS

D BROADCAST STUDIO EQUIPMENT

D MUSICAL INSTRUMENTS

D EFFECTS PROCESSORS

D A/V RECEIVERS

D CAR AUDIO SYSTEMS

DESCRIPTION

The PGA2320 is a high-performance, stereo audio volume

control designed for professional and high-end consumer

audio systems. The ability to operate from ±15V analog

power supplies enables the PGA2320 to process input

signals with large voltage swings, thereby preserving the

dynamic range available in the overall signal path. Using

high performance operational amplifier stages internal to

the PGA2320 yields low noise and distortion, while

providing the capability to drive 600Ω loads directly

without buffering. The three-wire serial control interface

allows for connection to a wide variety of host controllers,

in addition to support for daisy-chaining of multiple

PGA2320 devices.

PGA2320

SBOS312B − JULY 2004 − REVISED DECEMBER 2004

Stereo Audio Volume Control

www.ti.com

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

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Summary of content (17 pages)

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PGA2320 SBOS312B − JULY 2004 − REVISED DECEMBER 2004 Stereo Audio Volume Control FEATURES D DIGITALLY-CONTROLLED ANALOG VOLUME CONTROL: Two Independent Audio Channels Serial Control Interface Zero Crossing Detection Mute Function D WIDE GAIN AND ATTENUATION RANGE: +31.5dB to −95.5dB with 0.5dB Steps D LOW NOISE AND DISTORTION: D 120dB Dynamic Range 0.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 ELECTRICAL CHARACTERISTICS At TA = +25°C, VA+ = +15V, VA− = −15V, VD+ = +5V, RL = 100kΩ, CL = 20pF, BW measure = 20Hz to 20kHz, unless otherwise noted. PGA2320 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DC CHARACTERISTICS Step Size Gain Error Gain Setting = 31.5dB 0.5 dB ±0.1 dB ±0.
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" #$#% www.ti.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS At TA = +25°C, VA+ = +15V, VA− = −15V, VD+ = +5V, RL = 100kΩ, CL = 20pF, BW measure = 20Hz to 20kHz, unless otherwise noted. THD+N vs INPUT AMPLITUDE (Gain = 0dB, f = 1kHz) FREQUENCY RESPONSE (0dB = 6.0VRMS) GAIN = 0dB 0.1 1.0 0.8 0.6 0.01 0.2 THD+N (%) Amplitude (dB) 0.4 0 −0.2 −0.4 0.001 −0.6 −0.8 −1.0 10 100 1k 10k 0.0001 100m 100k 200k 1 THD+N vs INPUT FREQUENCY (Gain = 0dB, Amplitude = 3.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VA+ = +15V, VA− = −15V, VD+ = +5V, RL = 100kΩ, CL = 20pF, BW measure = 20Hz to 20kHz, unless otherwise noted. Crosstalk (dB) CROSSTALK OR CHANNEL SEPARATION vs INPUT FREQUENCY (Gain = 0dB, Amplitude = 8.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 GENERAL DESCRIPTION The PGA2320 is a stereo audio volume control. It may be used in a wide array of professional and consumer audio equipment. The PGA2320 is fabricated in a mixed-signal BiCMOS process in order to take advantage of the superior analog characteristics that the process offers. The heart of the PGA2320 is a resistor network, an analog switch array, and a high-performance bipolar op amp stage.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 gain settings. Data is formatted as MSB first, straight binary code. SCLK is the serial clock input. Data is clocked into SDI on the rising edge of SCLK. SERIAL CONTROL PORT The serial control port is utilized to program the gain settings for the PGA2320. The serial control port includes three input pins and one output pin. The inputs include CS (pin 2), SDI (pin 3), and SCLK (pin 6). The sole output pin is SDO (pin 7).
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 GAIN SETTINGS For N = 1 to 255: The gain for each channel is set by its corresponding 8-bit code, either R[7:0] or L[7:0]; see Figure 2. The gain code data is straight binary format. If we let N equal the decimal equivalent of R[7:0] or L[7:0], then the following relationships exist for the gain settings: Gain (dB) = 31.5 − [0.5 • (255 − N)] This results in a gain range of +31.5dB (with N = 255) to −95.5dB (with N = 1).
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 DAISY-CHAINING MULTIPLE PGA2320 DEVICES In order to reduce the number of control signals required to support multiple PGA2320 devices on a printed circuit board, the serial control port supports daisy-chaining of multiple PGA2320 devices. Figure 4 shows the connection requirements for daisy-chain operation. This arrangement allows a three-wire serial interface to control many PGA2320 devices.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 MUTE FUNCTION APPLICATIONS INFORMATION The PGA2320 includes a mute function. This function may be activated by either the MUTE input (pin 8), or by setting the gain byte value for one or both channels to 00HEX. The MUTE pin may be used to mute both channels, while the gain setting may be used to selectively mute the left and right channels.
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" #$#% www.ti.com SBOS312B − JULY 2004 − REVISED DECEMBER 2004 PRINTED CIRCUIT BOARD LAYOUT GUIDELINES It is recommended that the ground planes for the digital and analog sections of the printed circuit board (PCB) be separate from one another. The planes should be connected at a single point. Figure 6 shows the recommended PCB floor plan for the PGA2320. Analog Power Digital Power +5V DGND Host The PGA2320 is mounted so that it straddles the split between the digital and analog ground planes.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.