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PGA870

Programmable

Attenuator

ControlLogic

PGA870

SignalSource

+5V

Bandpass

Filter

ADS6149

F =250MHz

Powerdown1

LatchMode 1

GainStrobe1

FPGA

6bGainAdjust

FastGainControlLoop

PGA870

www.ti.com

SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011

High-Speed, Fully Differential, Programmable-Gain Amplifier

Check for Samples: PGA870

FEATURES

DESCRIPTION

• Wideband +5-V Operation: 650-MHz Bandwidth

The PGA870 is a wideband programmable-gain

amplifier (PGA) for high-speed signal chain and data

• Low Impedance, Voltage Mode Output

acquisition systems. The PGA870 has been

• Wide Gain Range: –11.5 dB to +20 dB

optimized to provide high bandwidth, low distortion,

• Precise 0.5-dB Gain Steps

and low noise, making it ideally suited as a 14-bit

Step-to-Step Gain Error = ±0.03 dB

analog-to-digital converter (ADC) driver for wireless

base station signal chain applications. The wide gain

• HD

: –93 dBc at 100 MHz

range of –11.5 dB to +20 dB can be adjusted in

• HD

: –88 dBc at 100 MHz

0.5-dB gain steps through a 6-bit control word applied

• IMD

: –98 dBc at 100 MHz, –95 dBc at 200 MHz

to the parallel interface. The gain control interface

may be configured as a level-triggered latch or an

• OIP3: +47 dBm at 100 MHz;

edge-triggered latch, or it may be placed in an

Exceeds +45 dBm for Frequencies to 300 MHz

unlatched (transparent) mode. In addition to the 6-bit

• Flexible Gain Control Interface:

gain control, the PGA870 contains a power-down pin

– Supports latched and unlatched options

(PD) that can be used to put the device into a

low-current, power-down mode. In this mode, the

– Gain may be set in power-down state

quiescent current drops to 2 mA, but the gain control

– Fast setup and hold times: 2.5 ns

circuitry remains active, allowing the gain of the

• Low Disable Current: 2 mA

PGA870 to be set before device power-up. The

• Pb-Free (RoHS-Compliant) and Green Package

PGA870 is offered in a QFN-28 PowerPAD™

package.

APPLICATIONS

Summary of content (39 pages)

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PG A8 70 PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com High-Speed, Fully Differential, Programmable-Gain Amplifier Check for Samples: PGA870 FEATURES DESCRIPTION • • • • The PGA870 is a wideband programmable-gain amplifier (PGA) for high-speed signal chain and data acquisition systems.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS: VS+= +5 V Boldface limits are tested at +25°C. At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL= 200 Ω differential, G = 20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS: VS+= +5 V (continued) Boldface limits are tested at +25°C. At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL= 200 Ω differential, G = 20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted. PGA870IRHD PARAMETER CONDITIONS MIN TYP TA= +25°C 3.5 3.7 TA= –40°C to +85°C 3.4 UNITS TEST LEVEL (1) V A V B 1.5 V A 1.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted. SMALL-SIGNAL AC RESPONSE Gain Adjusted from –11.5 dB to +5 dB Gain Adjusted in 0.5-dB Steps VOUT = 200 mVPP 25 Gain Adjusted in 0.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted. STEP-TO-STEP GAIN ERROR vs GAIN SETTING OVER TEMPERATURE LARGE-SIGNAL GAIN vs GAIN SETTING 25 0.15 20 0.10 Gain Error (dB) 15 Gain (dB) 10 5 0 -40°C 0.05 +25°C 0 -0.05 -0.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted. OUTPUT VOLTAGE NOISE vs FREQUENCY NOISE FIGURE vs GAIN 45 f = 100 MHz RSYS = 150 W 40 35 Noise Figure (dB) Output Voltage Noise (nV/?Hz) 1000 100 30 25 20 15 Gain = +20 dB Gain = -11.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA= +25°C, VS+= +5 V, differential input signal, differential VOUT = 2 VPP, RL = 200 Ω differential, G = +20 dB, and input and output common-mode at internal midsupply reference, unless otherwise noted.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com APPLICATION INFORMATION Device Operation The PGA870 is a wideband, fully differential, programmable-gain amplifier.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Output Amplifier The PGA870 has a differential, voltage-mode output stage with a differential output resistance of approximately 0.3 Ω and an inductive reactance equivalent to 3.8 nH. The common-mode output voltage has a nominal value of VMID2. This output amplifier has a nominal gain of +20 dB. The nominal load is 200 Ω, but the PGA870 can drive loads as low as 100 Ω with only minor changes to the device distortion.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Table 2. PGA870 Gain and Corresponding Gain Word Values Gain State NG B1 (LSB) B0 Gain State NG 1 1 1 1 1 0 1 1 0 1 1 1 1 1 1 17.5 1 1 57 17 1 56 16.5 55 54 Gain (dB) (MSB) B5 B4 B3 B2 Gain (dB) (MSB) B5 B4 B3 B2 B1 (LSB) B0 63 20 1 1 1 62 19.5 1 1 1 31 4 0 1 1 1 1 1 30 3.5 0 1 1 1 1 61 19 1 1 0 1 29 3 0 1 1 1 0 60 18.5 1 1 0 0 28 2.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Table 3 and Figure 43 show a summary table and timing diagrams of the gain modes, respectively. Figure 44 illustrates a timing diagram that defines the transitions and timing of the set-up and hold times for both level-triggered and edge-triggered latch modes.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Single-Ended to Differential Operation Figure 45 represents a single-ended to differential conversion test configuration with a 50-Ω source and a 200-Ω load. The midsupply pins VMID1 and VMID2 are properly bypassed; because this circuit is ac-coupled, these pins provide the biasing voltage required by the PGA870 input stage. The LATCH MODE, GAIN STROBE, and PD pins are connected to the supply voltage through a pull-up resistor.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Differential-to-Differential Operation Differential operation of PGA870 is shown in Figure 46. In this example, both input pins are connected to a differential 150-Ω source. The PGA870 is driving a typical 200-Ω load. Both midsupply voltage pins VMID1 and VMID2 are bypassed with a 0.1-μF capacitor. The LATCH MODE, GAIN STROBE, and PD pins are connected to the power supply using a 1-kΩ pull-up resistor.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Figure 47 shows one possible circuit using one channel of the high-speed, 4.5-ns propagation delay TLV3502. The switching speed of the output logic signal is limited by the propagation delay of the comparator. Using slower comparators limits the digital logic speed and can thus limit the gain control speed in automatic gain control applications. +2.5 V 2.5-V Input Logic VOH = 2.1 V, VOL = 0.9 V +2.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com eNAmpout is the output noise density of the PGA870 (30 nV/√Hz), ENB is the brick-wall equivalent noise bandwidth of the filter, and VO is the amplifier output signal. For example, with a first-order (N = 1) bandpass or low-pass filter with 30-MHz cutoff, the ENB is 1.57 • f–3dB = 1.57 • 30 MHz = 47.1 MHz. For second-order (N = 2) filters, the ENB is 1.22 • f–3dB. As the filter order increases, the ENB approaches f–3dB (for N = 3, ENB = 1.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Differential phase shift is the difference in the phase response between the two branches of the differential filter signal path. Differential phase shift in the filter as a result of mismatched components caused by nominal tolerance can severely degrade the even-order distortion of the amplifier-ADC chain.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com ADC Input Common-Mode Voltage Considerations: DC-Coupled Input DC-coupled applications vary in complexity and requirements depending on the ADC; one requirement is the need to resolve the mismatch between the common-mode voltage of the driving amplifier and the ADC. For example, while the PGA870 has a fixed output common-mode of midsupply, or 2.5 V on a single 5-V supply, the ADS6149 requires a nominal 1.5-V input common-mode.
PAGE 24
PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Using the ADC examples given previously, Table 4 shows sample calculations of the value of RP and VAMP_FS for full-scale drive, and then for –1 dBFS. Table 4. Example RP for Various ADCs ADC VAMP (VDC) VCM (VDC) VREF (VDC) ADC RIN || CIN at 170 MHz (Ω) RO (Ω) RP (Ω) GAIN (V/V) GAIN (dB) VADC_FS (VPP) VAMP_PP for 0 dBFS (VPP) VAMP_PP –1 dBFS (VPP) ADS6149 2.5 1.5 0 216 25 37.5 0.53 –5.57 2 3.80 3.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Testing the PGA870 with a First-Order Bandpass Filter Differential phase shift in a differential filter because of component mismatches can lead to severely degraded even-order distortion performance. In applications where good SFDR performance at the expense of slight degradation in SNR is acceptable, a first-order filter can prove to be less sensitive and provide more repeatable results compared to higher-order filters.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Figure 52. FFT Plot of PGA870 (G = 20 dB) + First-Order Bandpass Filter and ADS58C48 with Single-Tone Input at 170 MHz Figure 53. FFT Plot of PGA870 (G = –4 dB) + First-Order Bandpass Filter and ADS58C48 with Single-Tone Input at 170 MHz Table 5.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Figure 54 and Figure 55 each show the FFT plots for the same first-order bandpass filter circuit with two-tone inputs, with each tone at –7 dBFS and the PGA870 set to a gain of 20 dB. Figure 54 shows the FFT for two-tone inputs at 160 MHz and 170 MHz. The third-order intermodulation distortion products at 150 MHz and 180 MHz are less than –86 dBc. Figure 55 shows the FFT for two-tone inputs at 168 MHz and 170 MHz.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Testing the PGA870 with a Second-Order Bandpass Filter For better combined SNR performance, narrower bandwidth and/or higher-order filters are required between the PGA870 and ADC. However, narrow filter bandwidth and highe-order filters cause the signal chain performance to depend more strongly on component tolerance and mismatch.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Figure 57. FFT Plot of PGA870 (G = 20 dB) + Second-Order Bandpass Filter and ADS58C48 with Single-Tone Input at 170 MHz Figure 58. FFT Plot of PGA870 (G = –4 dB) + Second-Order Bandpass Filter and ADS58C48 with Single-Tone Input at 170 MHz Table 6.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com Figure 59 and Figure 60 show the FFT plots for the same second-order bandpass filter circuit with two-tone inputs, with each tone at –7 dBFS and the PGA870 set to a gain of 20 dB. Figure 59 shows the FFT for two-tone inputs at 160 MHz and 170 MHz. The third-order intermodulation distortion products at 150 MHz and 180 MHz are less than –90 dBc, though the second-order intermodulation distortion product at 10 MHz is at –82 dBc.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com PCB Layout Recommendations Complete information about the PGA870EVM is found in the PGA870EVM User Guide, available for download through the PGA870 product folder on the TI web site. Printed circuit board (PCB) layout should follow these general guidelines: 1. Signal routing should be direct and as short as possible into and out of the device input and output pins.
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PGA870 SBOS436A – DECEMBER 2009 – REVISED FEBRUARY 2011 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (December, 2009) to Revision A Page • Updated Related Products table ........................................................................................................................................... 1 • Changed storage temperature range specification in Absolute Maximum Ratings table .........
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant PGA870IRHDR VQFN RHD 28 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 PGA870IRHDT VQFN RHD 28 250 180.0 12.4 5.3 5.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) PGA870IRHDR VQFN RHD 28 3000 367.0 367.0 35.0 PGA870IRHDT VQFN RHD 28 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.