Datasheet

TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com SPNS141F–AUGUST 2010– REVISED JULY 2011
TMS570LS Series 16/32-BIT RISC Flash Microcontroller
Check for Samples: TMS570LS20216, TMS570LS20206, TMS570LS10216, TMS570LS10206, TMS570LS10116, TMS570LS10106
1 TMS570LS Series 16/32-BIT RISC Flash Microcontroller
1.1 Features
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– Programmable External Clock (ECLK)
• High-Performance Automotive Grade
Microcontroller for Safety Critical Applications • Communication Interfaces
– Certified for use in SIL3 Applications – Three Multi-buffered Serial Peripheral
Interface (MibSPI) each with:
– Dual CPUs running in Lockstep
• Four Chip Selects and one Enable pin
– ECC on Flash and SRAM
• 128 buffers with parity
– CPU and Memory BIST (Built-In Self Test)
• One with parallel mode
– Error Signaling Module (ESM) w/ Error Pin
– Two UART (SCI) interfaces with Local
• ARM® Cortex™-R4F 32-Bit RISC CPU
Interconnect Network Interface (LIN 2.0)
– Efficient 1.6 DMIPS/MHz with 8-stage
– Three CAN (DCAN) Controller
pipeline
• Two with 64 mailboxes, one with 32
– Floating Point Unit with Single/Double
Precision • Parity on mailbox RAM
– Memory Protection Unit (MPU) – Dual Channel FlexRay™ Controller
– Open Architecture With Third-Party Support • 8K-Byte message RAM with parity
• Operating Features • Transfer Unit with MPU and parity
– Up to 160-MHz System Clock • High-End Timer (NHET)
– Core Supply Voltage (V
CC
): 1.5 V – 32 Programmable I/O Channels
– I/O Supply Voltage (V
CCIO
): 3.3 V – 128 Words High-End Timer RAM with parity
• Integrated Memory – Transfer Unit with MPU and parity
– 1M-Byte or 2M-Byte Flash with ECC • Two 12-Bit Multi-Buffered ADCs (MibADC)
– 128K-Byte or 160K-Byte RAM with ECC – 24 total ADC Input channels
• Multiple Communication interfaces including – Each has 64 Buffers with parity
FlexRay, CAN, and LIN
• Trace and Calibration Interfaces
• NHET Timer and 2x 12-bit ADCs
– Embedded Trace Module (ETMR4)
• External Memory Interface (EMIF)
– Data Modification Module (DMM)
– 16bit Data, 22bit Address, 4 Chip Selects
– RAM Trace Port (RTP)
• Common TMS470/570 Platform Architecture
– Parameter Overlay Module (POM)
– Consistent Memory Map across the family
• On-Chip emulation logic including IEEE 1149.1
– Real-Time Interrupt (RTI) OS Timer JTAG, Boundary Scan and ARM Coresight
components
– Vectored Interrupt Module (VIM)
• Full Development Kit Available
– Cyclic Redundancy Checker (CRC, 2
Channels) – Development Boards
• Direct Memory Access (DMA) Controller – Code Composer Studio Integrated
Development Environment (IDE)
– 32 DMA requests and 16 Channels/ Control
Packets – HaLCoGen Code Generation Tool
– Parity on Control Packet Memory – HET Assembler and Simulator
– Dedicated Memory Protection Unit (MPU) – nowFlash Flash Programming Tool
• Frequency-Modulated Zero-Pin Phase-Locked • Packages Supported
Loop (FMzPLL)-Based Clock Module
– 144-Pin Quad Flat Pack (PGE) [Green]
– Oscillator and PLL clock monitor
– 337-Pin Ball Grid Array (ZWT) [Green]
• Up to 115 Peripheral IO pins
• Community Resources
– 16 Dedicated GIO - 8 w/ External Interrupts
– TI E2E Community
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2010–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.