User’s Guide January 2002 AAP Data Acquisition (Dallas) SLAU081
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of ±12 V and the output voltage range of ±12 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
Running Title—Attribute Reference Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 EVM Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.1 Stand-Alone Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.2 User Mode . . . . . . . . . . . . . . . .
Running Title—Attribute Reference Figures 2–1 SAM Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Tables 2–1 2–2 2–3 vi Default Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Default Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 Introduction This chapter contains an overview of the features and functions of the EVM. Topic Page 1.1 EVM Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 1.2 Analog Input Conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–3 1.3 Analog Output Conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–3 1.4 Prototype Area . . . . . . . . . . . . . . . . . . . .
EVM Modes This user’s guide has been written to help you get the most from your evaluation module (EVM). The TLC4541 EVM is a member of the multipurpose (MP) family of serial EVMs. It provides a platform to demonstrate the performance and functionality of the TLC4541 ADC and the TLV5636 DAC. TI’s websites are regularly updated. They present the latest software additions, development information, troubleshooting help, general background, as well as all applicable data sheets.
Analog Input Conditioning 1.1.1 Stand-Alone Mode A unique feature of this EVM is the facility it offers the user to closely couple the ADC and DAC with a minimum of user intervention. This feature allows the serial bit stream from the digitized analog output to be fed directly to the DAC. Therefore, the signal that is fed into the ADC can be reconstructed via the DAC. No DSP need be present. SAM is selected by: - Switching SW1-1 to the on position, LED is on. 1.1.
Chapter 2 Getting Started This chapter describes how the user can modify the various options of this EVM. Topic Page 2.1 Shipping (Default Configuration) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.3 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.4 Connectors . . . . . . . . . . .
Shipping (Default Configuration) It is very important that users feel comfortable with the EVM from the beginning. To achieve this, each unit is manufactured and shipped in a predetermined condition. This allows the user to begin evaluation of the system immediately and to have confidence that the EVM is working. To confirm that the EVM is working properly, follow the steps below: 1) 2) 3) 4) 5) 6) Apply power to the system. The green LED will illuminate. Ensure stand-alone mode (SAM) LED is on.
Shipping (Default Configuration) Table 2–1. Default Switch Settings Switch Settings Default Configuration Description SW1-1 On Stand-alone mode is selected, LED is on SW1-2 Off Reserved SW1-3 Off Reserved SW1-4 Off Reserved Table 2–2. Default Jumper Settings Jumper Settings Default Configuration Description Pins 1–2 Pins 2–3 W1 Inserted Not inserted Input for channel 0 is via BNC connector J1. W2 Not inserted Inserted Sine wave test signal is selected for channel 0.
Jumpers 2.2 Jumpers The table below lists the functions that users can reconfigure along with the shipping condition. Table 2–3. Jumper/Function Reference Function Reference Designator Subsection Analog input W1, W11, W4, W2, W3 3.2.3 Analog output W14, W19, W18 3.2.4 Disable onboard signal generator W9 3.2.7 Voltage reference W16, W17 3.2.8 3.3-V/5-V analog supply select W13 3.2.9 Clock/timer routing W20, W21, W22, W23, W24 3.2.10 Channel 0 2.2.
Jumpers 2.2.3 Channel 0 Analog Output With a one-channel DAC installed, this signal is the primary analog output (output A). With a two-channel DAC installed, the pinout of these devices effectively resolves this channel to be the secondary analog output (output B). Analog Input Configuration Channel 0 Reference Designator W19 Functional Description This jumper selects the source for the analog output on channel 0.
Switches 2.2.7 Clock/Timer Routing A variety of options are available to the user. Be careful about altering these. Clock/Timer Routing Reference Designator Functional Description W21 This jumper defines the clock that the ADC and DAC use for all their timing. The user can select either the output from W23 or the output from W22 to be the base clock for the system. W23 This jumper allows the user to select either an external clock, or the onboard 20-MHz oscillator for conversion.
Connectors If SW1-1 is set to the on position, user mode is selected. In this case the user has absolute control of the data and control signals for the ADC and DAC. With SW1-1 in the on position, the logic that generates the control for SAM is disabled and plays no active part in the process. 2.4 Connectors In addition to jumpers and switches, the user also has access to various connectors. This section details the pinout of each connector.
Connectors Reference Designator J4 Description Analog g input option,, 26-pin DIL header Pin Number 1 Channel 0 input 2 AGND 3 Channel 1 input 4 AGND 5 Not connected 6 AGND 7 Not connected 8 AGND 9 Not connected 10 AGND 11 Not connected 12 AGND 13 Not connected 14 AGND 15 Not connected 16 AGND 17 Not connected 18 AGND 19 Not connected 20 AGND 21 Not connected 22 AGND 23 Not connected 24 AGND 25 External reference voltage 26 AGND Reference Designator J5
Connectors Reference Designator J7 J8 Description EVM power Analog g output option,, 26-pin DIL header Pin Number Function 1 5V 2 –12 V 3 0V 4 12 V 1 No output 2 AGND 3 Analog output for one-channel DAC 4 AGND 5 Not connected 6 AGND 7 Not connected 8 AGND 9 Not connected 10 AGND 11 Not connected 12 AGND 13 Not connected 14 AGND 15 Not connected 16 AGND 17 Not connected 18 AGND 19 Not connected 20 AGND 21 Not connected 22 AGND 23 Not connected 24 A
Connectors Reference Designator J9 2-10 Description Analog g input option for universal operational-amplifier evaluation board, SIL PTH not installed.
ADC and DAC Direct Access 2.5 ADC and DAC Direct Access J10 and J11 offer users the facility to directly inspect the digital signals coming from and going to the ADC and DAC.
Host Communication 2.6.1 Common Connector Reference Designator J16 2-12 Description 80-pin memoryy interface connector for ’C5000 and ’C6000 DSK EVMs. Pins unused by this EVM are omitted for clarity. Pin Number Function 1 5V 2 5V 11 PCI ground 12 PCI ground 21 5V 22 5V 29 PCI ground 30 PCI ground 31 PCI ground 32 PCI ground 41 3.3 V 42 3.
Host Communication Reference Designator J17 Description 80-pin peripheral and control connector for ’C5000 and ’C6000 DSK EVMs. Pins unused by this EVM are omitted for clarity.
Host Communication 2.6.2 Legacy Connector J12, J13, and J15 are three 2x20 headers daisy-chained together and are collectively referred to as the legacy connector. The principle behind this arrangement is to eliminate the confused and untidy custom cabling that is typically present when connecting a legacy DSP to an EVM. This daisy-chained connector method is flexible, robust, and makes it possible to use a standard flat signal-cable assembly, improving reliability of communications between host and EVM.
Host Communication Consider a host cable signal assignment as shown below: Host Connector Pin No. Signal Pin No. Signal 1 NA 2 DGND 3 NA 4 DGND 5 CLKX 6 CLKR 7 TOUT 8 DGND 9 DX 10 DR 11 FSX 12 FSR 13 NA 14 DGND 15 XF 16 DGND 17 NA 18 NA 19 NA 20 CLKS The host connector mates with J12. Signals on either side of J12 are available on J13 and J15. J13 Host Connector Plugged into J12 J15 Pin No. Pin No. Signal Pin No. Signal Pin No.
Host Communication For clarity, the above table can be redrawn with J12 removed. J13 J15 Pin No. Signal Pin No. Signal 2 NA 1 DGND 4 NA 3 DGND 6 CLKX 5 CLKR 8 TOUT 7 DGND 10 DX 9 DR 12 FSX 11 FSR 14 NA 13 DGND 16 XF 15 DGND 18 NA 17 NA 20 NA 19 CLKS The table below shows the signal names and pin assignments that the composite connector shown above must be mapped onto. J13 2-16 Pin No.
Host Communication All of the signals required to interface the EVM to the host are now available on either J13 or J15. This is simply a matter of wire-wrapping in the following way: Wire Wrap J13 Pin No. Signal 2 NA 4 NA 6 J13 Pin No. Signal CLKX 3 CLKX 8 TOUT 19 TOUT 10 DX 7 DX 12 FSX 11 FSX 14 NA 16 XF 1 XF 18 NA 20 NA Wire Wrap J15 J13 Pin No. Signal Pin No.
Host Communication All of these connectors are shown below: Reference Designator J12 2-18 Description 20-pin connector Pin Number Signal Name/Function 1 J13 pin 2 2 J15 pin 1 3 J13 pin 4 4 J15 pin 3 5 J13 pin 6 6 J15 pin 5 7 J13 pin 8 8 J15 pin 7 9 J13 pin 10 10 J15 pin 9 11 J13 pin 12 12 J15 pin 11 13 J13 pin 14 14 J15 pin 13 15 J13 pin 16 16 J15 pin 15 17 J13 pin 18 18 J15 pin 17 19 J13 pin 20 20 J15 pin 19
Host Communication Reference Designator J13 Description 20-pin signal connector Pin Number Signal Name/Function 1 ADC select signal 2 J12 pin 1 3 CLKX/transmit clock 4 J12 pin 3 5 CLKR receive clock 6 J12 pin 5 7 DX/data transmit 8 J12 pin 7 9 DR/data receive 10 J12 pin 9 11 FSX/frame sync transmit 12 J12 pin 11 13 FSR/frame sync receive 14 J12 pin 13 15 Reserved 16 J12 pin 15 17 CLKS/sync clock 18 J12 pin 17 19 TOUT/host timer output 20 J12 pin 19 Getting Started
Host Communication Reference Designator J15 2-20 Description 20-Pin connector Pin Number Signal Name/Function 1 J12 pin 2 2 DGND 3 J12 pin 4 4 DGND 5 J12 pin 6 6 DGND 7 J12 pin 8 8 DGND 9 J12 pin 10 10 DGND 11 J12 pin 12 12 DGND 13 J12 pin 14 14 DGND 15 J12 pin 16 16 DGND 17 J12 pin 18 18 DGND 19 J12 pin 20 20 DGND
Appendix A Bill of Materials, Board Layout, and Schematics This appendix contains the bill of materials, board layouts, and the EVM schematics.
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1 2 3 4 5HYLVLRQ +LVWRU\ 5(9 (&1 1XPEHU $SSURYHG TO / FROM USER CONNECTIONS DSP_TOUT DSP_TOUT D SYSCLK DSP_CLKS DSP_CLKS D EVM_CLKX +DVdd DSP_CLKX DSP_CLKX DSP_FSR DSP_CLKR DSP_CLKR X1 8 DSP_DX DSP_DX C64 0.01uF DSP_DR DSP_DR DSP_FSX DSP_FSX C65 0.
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