Car Stereo System - Car Radio Digital Signal Processor User Manual

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7.10.5 BUSREQ Timing
AECLKOUTx
1
ABUSREQ
1
SM320C6455-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008
Table 7-50. Switching Characteristics Over Recommended Operating Conditions for the BUSREQ Cycles
for EMIFA Module (see Figure 7-40 )
-720
-850
A-1000/-1000
NO. PARAMETER UNIT
-1200
MIN MAX
1 t
d(AEKOH-ABUSRV)
Delay time, AECLKOUT high to ABUSREQ valid 1 5.5 ns
Figure 7-40. BUSREQ Timing for EMIFA
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