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SN65176B, SN75176B

DIFFERENTIAL BUS TRANSCEIVERS

SLLS101D – JULY 1985 – REVISED APRIL 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Bidirectional Transceivers

Meet or Exceed the Requirements of ANSI

Standards TIA/EIA-422-B and TIA/EIA-485-A

and ITU Recommendations V.11 and X.27

Designed for Multipoint Transmission on

Long Bus Lines in Noisy Environments

3-State Driver and Receiver Outputs

Individual Driver and Receiver Enables

Wide Positive and Negative Input/Output

Bus Voltage Ranges

Driver Output Capability . . . ±60 mA Max

Thermal Shutdown Protection

Driver Positive and Negative Current

Limiting

Receiver Input Impedance . . . 12 kΩ Min

Receiver Input Sensitivity . . . ±200 mV

Receiver Input Hysteresis . . . 50 mV Typ

Operate From Single 5-V Supply

description/ordering information

The SN65176B and SN75176B differential bus transceivers are integrated circuits designed for bidirectional

data communication on multipoint bus transmission lines. They are designed for balanced transmission lines

and meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27.

The SN65176B and SN75176B combine a 3-state differential line driver and a differential input line receiver,

both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low

enables, respectively, that can be connected together externally to function as a direction control. The driver

differential outputs and the receiver differential inputs are connected internally to form differential input/output

(I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or V

= 0.

These ports feature wide positive and negative common-mode voltage ranges, making the device suitable for

party-line applications.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP (P) Tube of 50 SN75176BP SN75176BP

Cto70

SOIC (D)

Tube of 75 SN75176BD

75176B

0°C

70°C

SOIC

(D)

Reel of 2500 SN75176BDR

75176B

SOP (PS) Reel of 2000 SN75176BPSR A176B

PDIP (P) Tube of 50 SN65176BP SN65176BP

–40°C to 105°C

SOIC (D)

Tube of 75 SN65176BD

65176B

SOIC

(D)

Reel of 2500 SN65176BDR

65176B

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

SN65176B ...D OR P PACKAGE

SN75176B . . . D, P, OR PS PACKAGE

(TOP VIEW)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (21 pages)

PAGE 1
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 D D D D D D D D D D D D D Bidirectional Transceivers Meet or Exceed the Requirements of ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27 Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments 3-State Driver and Receiver Outputs Individual Driver and Receiver Enables Wide Positive and Negative Input/Output Bus Voltage Ranges Driver Output Capability . . .
PAGE 2
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 description/ordering information (continued) The driver is designed for up to 60 mA of sink or source current. The driver features positive and negative current limiting and thermal shutdown for protection from line-fault conditions. Thermal shutdown is designed to occur at a junction temperature of approximately 150°C.
PAGE 3
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 schematics of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF A AND B I/O PORTS TYPICAL OF RECEIVER OUTPUT VCC VCC R(eq) Input 16.
PAGE 4
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 recommended operating conditions VCC Supply voltage VI or VIC Voltage at any bus terminal (separately or common mode) VIH VIL High-level input voltage D, DE, and RE Low-level input voltage D, DE, and RE VID Differential input voltage (see Note 4) IOH High level output current High-level IOL Low level output current Low-level TA Operating free free-air air temperature MIN TYP MAX UNIT 4.75 5 5.
PAGE 5
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) TEST CONDITIONS† PARAMETER VIK VO Input clamp voltage Output voltage II = –18 mA IO = 0 |VOD1| Differential output voltage IO = 0 |VOD2| g Differential output voltage MIN TYP‡ 0 1.
PAGE 6
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 SYMBOL EQUIVALENTS DATA-SHEET PARAMETER TIA/EIA-422-B TIA/EIA-485-A VO |VOD1| Voa, Vob Vo Voa, Vob Vo |VOD2| Vt (RL = 100 Ω) Vt (RL = 54 Ω) Vt ((test termination measurement 2) |VOD3| ∆|VOD| | |Vt| – |Vt| | | |Vt – |Vt| | VOC ∆|VOC| |Vos| |Vos – Vos| |Vos| |Vos – Vos| IOS IO |Isa|, |Isb| |Ixa|, |Ixb| Iia, Iib RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input vo
PAGE 7
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25°C PARAMETER TEST CONDITIONS tPLH tPHL Propagation delay time, low- to high-level output tPZH tPZL Output enable time to high level tPHZ tPLZ Output disable time from high level MIN TYP MAX 21 35 23 35 10 20 12 20 20 35 17 25 V See Figure 6 VID = 0 to 3 V, Propagation delay time, high- to low-level output See Figure 7 Output enable tim
PAGE 8
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 PARAMETER MEASUREMENT INFORMATION Output 3V S1 Input 1.5 V 1.5 V 0 V or 3 V 0V CL = 50 pF (see Note A) Generator (see Note B) RL = 110 Ω 50 Ω 0.5 V tPZH VOH Output 2.3 V tPHZ TEST CIRCUIT Voff ≈0 V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B.
PAGE 9
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 PARAMETER MEASUREMENT INFORMATION S1 1.5 V 2 kΩ –1.5 V S2 5V CL = 15 pF (see Note A) Generator (see Note B) 5 kΩ 1N916 or Equivalent 50 Ω S3 TEST CIRCUIT 3V Input 3V Input 1.5 V 0V tPZH S1 to 1.5 V S2 Open S3 Closed 1.5 V S1 to –1.5 V 0 V S2 Closed S3 Open tPZL VOH ≈4.5 V 1.5 V Output Output 0V 1.5 V VOL 3V 1.5 V Input 3V S1 to 1.5 V S2 Closed S3 Closed Input S1 to –1.
PAGE 10
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS DRIVER DRIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 VCC = 5 V TA = 25°C 4.5 4 3.5 3 2.5 2 1.5 1 4 3.5 3 2.5 2 1.5 1 0.5 0.5 0 VCC = 5 V TA = 25°C 4.
PAGE 11
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS RECEIVER HIGH-LEVEL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE† RECEIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 5 VOH – High-Level Output Voltage – V VOH VOH – High-Level Output Voltage – V VOH VID = 0.2 V TA = 25°C 4.5 4 3.5 3 2.5 VCC = 5.25 V 2 VCC = 5 V 1.5 VCC = 5 V VID = 200 mV IOH = –440 µA 4.5 VCC = 4.75 V 1 4 3.5 3 2.5 2 1.5 1 0.5 0.
PAGE 12
SN65176B, SN75176B DIFFERENTIAL BUS TRANSCEIVERS SLLS101D – JULY 1985 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS RECEIVER RECEIVER OUTPUT VOLTAGE vs ENABLE VOLTAGE OUTPUT VOLTAGE vs ENABLE VOLTAGE 5 6 VID = 0.2 V Load = 8 kΩ to GND TA = 25°C VCC = 5 V 3 5 VCC = 5.25 V VO – Output Voltage – V VO VO – Output Voltage – V VO 4 VID = –0.2 V Load = 1 kΩ to VCC TA = 25°C VCC = 5.25 V VCC = 4.75 V 2 1 VCC = 4.75 V VCC = 5 V 4 3 2 1 0 0 0 0.5 1 1.5 2 2.5 0 3 0.5 1 1.5 2 2.
PAGE 13
PACKAGE OPTION ADDENDUM www.ti.
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 18-Oct-2013 Status (1) SN75176BPSRG4 ACTIVE Package Type Package Pins Package Drawing Qty SO PS 8 2000 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Op Temp (°C) Device Marking (4/5) 0 to 70 A176B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 15
PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65176BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65176BDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75176BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75176BDRG4 SOIC D 8 2500 330.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65176BDR SOIC D 8 2500 340.5 338.1 20.6 SN65176BDRG4 SOIC D 8 2500 340.5 338.1 20.6 SN75176BDR SOIC D 8 2500 340.5 338.1 20.6 SN75176BDRG4 SOIC D 8 2500 340.5 338.1 20.6 SN75176BPSR SO PS 8 2000 367.0 367.0 38.
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