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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Operate With 3-V to 5.5-V V

Supply

D Operate Up To 1 Mbit/s

D Low Supply Current . . . 300 µA Typ

D External Capacitors ...4 × 0.1 µF

D Accept 5-V Logic Input With 3.3-V Supply

D Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

D RS-232 Bus-Pin ESD Protection Exceeds

±15 kV Using Human-Body Model (HBM)

D Applications

− Battery-Powered Systems, PDAs,

Notebooks, Laptops, Palmtop PCs, and

Hand-Held Equipment

description/ordering information

The SN65C3232 and SN75C3232 consist of two line drivers, two line receivers, and a dual charge-pump circuit

with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). These devices provide the

electrical interface between an asynchronous communication controller and the serial-port connector. The

charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices

operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

SOIC − D

Tube of 40 SN65C3232D

65C3232

SOIC − D

Reel of 2500 SN65C3232DR

65C3232

SOIC − DW

Tube of 40 SN65C3232DW

65C3232

−40°C to 85°C

SOIC − DW

Reel of 2000 SN65C3232DWR

65C3232

−40 C to 85 C

SSOP − DB Reel of 2000 SN65C3232DBR 65C3232

TSSOP − PW

Tube of 90 SN65C3232PW

CB3232

TSSOP − PW

Reel of 2000 SN65C3232PWR

CB3232

SOIC − D

Tube of 40 SN75C3232D

75C3232

SOIC − D

Reel of 2500 SN75C3232DR

75C3232

SOIC − DW

Tube of 40 SN75C3232DW

75C3232

0°C to 70°C

SOIC − DW

Reel of 2000 SN75C3232DWR

75C3232

0 C to 70 C

SSOP − DB Reel of 2000 SN75C3232DBR 75C3232

TSSOP − PW

Tube of 90 SN75C3232PW

CA3232

TSSOP − PW

Reel of 2000 SN75C3232PWR

CA3232

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

D, DB, DW, OR PW PACKAGE

(TOP VIEW)

C1+

V+

C1−

C2+

C2−

V−

DOUT2

RIN2

GND

DOUT1

RIN1

ROUT1

DIN1

DIN2

ROUT2

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Summary of content (20 pages)

PAGE 1
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 D D D D D D D D D, DB, DW, OR PW PACKAGE (TOP VIEW) Operate With 3-V to 5.5-V VCC Supply Operate Up To 1 Mbit/s Low Supply Current . . . 300 µA Typ External Capacitors . . . 4 × 0.1 µF Accept 5-V Logic Input With 3.
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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 Function Tables EACH DRIVER INPUT DIN OUTPUT DOUT L H H L H = high level, L = low level EACH RECEIVER INPUT RIN OUTPUT ROUT L H H L Open H H = high level, L = low level, Open = input disconnected or connected driver off logic diagram (positive logic) 11 14 DIN1 DOUT1 10 7 DIN2 DOUT2 12 13 ROUT1 RIN1 9 ROUT2 2 POST OFFICE BOX 655303 8 RIN2 • DALLAS, TEXAS 7
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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER TEST CONDITIONS MIN TYP† VOH VOL High-level output voltage DOUT at RL = 3 kΩ to GND, DIN = GND 5 5.4 Low-level output voltage DOUT at RL = 3 kΩ to GND, DIN = VCC −5 −5.
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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 RECEIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 4 and Figure 4) PARAMETER VOH VOL MIN TYP† VCC − 0.6 V VCC − 0.1 V TEST CONDITIONS High-level output voltage IOH = −1 mA IOL = 1.6 mA Low-level output voltage VIT+ Positive-going input threshold voltage VCC = 3.
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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 PARAMETER MEASUREMENT INFORMATION 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPHL tPLH VOH 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2.
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SLLS540B − JULY 2002 − REVISED NOVEMBER 2004 APPLICATION INFORMATION 1 + C1 − 2 †+ C3 − 3 4 C1+ VCC 16 V+ GND 15 14 DOUT1 C1− 13 C2+ + C2 + CBYPASS = 0.1 µF − RIN1 5 kΩ − 5 C2− 12 6 C4 DOUT2 RIN2 − V− 11 ROUT1 DIN1 + 7 10 8 9 DIN2 ROUT2 5 kΩ † C3 can be connected to VCC or GND. VCC vs CAPACITOR VALUES VCC C1 C2, C3, C4 3.3 V ± 0.3 V 5 V ± 0.5 V 3 V to 5.5 V 0.1 µF 0.047 µF 0.1 µF 0.1 µF 0.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 28-May-2007 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN65C3232DBR SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DB 16 2000 330.0 16.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.2 6.6 2.5 12.0 16.0 Q1 SN65C3232DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN65C3232DWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65C3232DBR SSOP DB 16 2000 367.0 367.0 38.0 SN65C3232DR SOIC D 16 2500 333.2 345.9 28.6 SN65C3232DWR SOIC DW 16 2000 367.0 367.0 38.0 SN65C3232PWR TSSOP PW 16 2000 367.0 367.0 35.0 SN75C3232DBR SSOP DB 16 2000 367.0 367.0 38.0 SN75C3232DR SOIC D 16 2500 333.2 345.9 28.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.