Datasheet
1
FEATURES APPLICATIONS
1
2
3
4
8
7
6
5
R
RE
DE
D
V
CC
B
A
GND
D PACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
SN65HVD10-EP , , SN65HVD11-EP
SN65HVD12-EP
SGLS278E – DECEMBER 2004 – REVISED SEPTEMBER 2007
www.ti.com
3.3 V RS-485 TRANSCEIVERS
• Digital Motor Control
• Controlled Baseline
• Utility Meters
– One Assembly/Test Site
• Chassis-to-Chassis Interconnects
– One Fabrication Site
• Electronic Security Stations
• Extended Temperature Performance of Up to
• Industrial Process Control
– 40 ° C to 125 ° C and – 55 ° C to 125 ° C
• Building Automation
• Enhanced Diminishing Manufacturing Sources
• Point-of-Sale (POS) Terminals and Networks
(DMS) Support
• Enhanced Product-Change Notification
• Qualification Pedigree
(1)
• Operates With a 3.3 V Supply
• Bus-Pin ESD Protection Exceeds 16 kV HBM
• 1/8 Unit-Load Option Available (Up to 256
Nodes on the Bus)
• Optional Driver Output Transition Times for
Signaling Rates of 1 Mbps, 10 Mbps, and
25 Mbps
(2)
• Meets or Exceeds the Requirements of ANSI
The SN65HVD10, SN65HVD11, and SN65HVD12
TIA/EIA-485-A
combine a 3-state differential line driver and
differential input line receiver that operate with a
• Bus-Pin Short Circuit Protection From – 7 V to
single 3.3 V power supply. They are designed for
12 V
balanced transmission lines and meet or exceed
• Low-Current Standby Mode . . . 1 μ A (Typ)
ANSI standard TIA/EIA-485-A and ISO 8482:1993.
• Open-Circuit, Idle-Bus, and Shorted-Bus
These differential bus transceivers are monolithic
integrated circuits designed for bidirectional data
Failsafe Receiver
communication on multipoint bus-transmission lines.
• Thermal Shutdown Protection
The drivers and receivers have active-high and
• Glitch-Free Power-Up and Power-Down
active-low enables respectively, that can be externally
Protection for Hot-Plugging Applications
connected together to function as direction control.
Low device standby supply current can be achieved
• SN75176 Footprint
by disabling the driver and the receiver.
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
The driver differential outputs and receiver differential
extended temperature range. This includes, but is not limited
inputs connect internally to form a differential
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
input/output (I/O) bus port that is designed to offer
electromigration, bond intermetallic life, and mold compound
minimum loading to the bus whenever the driver is
life. Such qualification testing should not be viewed as
disabled or V
CC
= 0. These parts feature wide positive
justifying use of this component beyond specified
and negative common-mode voltage ranges, making
performance and environmental limits.
them suitable for party-line applications.
(2) The signaling rate of a line is the number of voltage
transitions that are made per second expressed in the units
bps (bits per second).
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2004 – 2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.