Datasheet

SLOPE CONTROL
1
2
3
4 5
6
7
8
CANL
R
CANH
Vcc
Rs
GND
LBK
D
IOPF6
TMS320LF2407
10 kΩ
to
100 kΩ
0
5
10
15
20
25
0 4.7 6.8 10 15 22 33 47 68 100
Slope (V/us)
Slope Control Resistance - kΩ
SN65HVD233-EP
SLLS944 – NOVEMBER 2008 ............................................................................................................................................................................................ www.ti.com
The standard specifies the interconnect to be a single twisted-pair cable (shielded or unshielded) with 120- Ω
characteristic impedance (Z
O
). Resistors equal to the characteristic impedance of the line terminate both ends of
the cable to prevent signal reflections. Unterminated drop-lines (stubs) connecting nodes to the bus should be
kept as short as possible to minimize signal reflections.
The rise and fall slope of the SN65HVD233 driver output can be adjusted by connecting a resistor from R
s
(pin 8)
to ground (GND), or to a low-level input voltage as shown in Figure 27 .
The slope of the driver output signal is proportional to the pin's output current. This slope control is implemented
with an external resistor value of 10 k Ω to achieve a ≈ 15 V/ µ s slew rate, and up to 100 k Ω to achieve a ≈ 2.0 V/ µ s
slew rate as displayed in Figure 28 . Typical driver output waveforms with slope control are displayed in
Figure 29 .
Figure 27. Slope Control/Standby Connection to a DSP
Figure 28. SN65HVD233 Driver Output Signal Slope vs Slope Control Resistance Value
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Product Folder Link(s): SN65HVD233-EP