Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - transceivers CAN 1/1 SOIC 8

D DRJ P

4 5

functiondiagram

(positivelogic)

ref

CANH

CANL

3 6

GND

CANL

CANH

ref

SN55HVD251

SN65HVD251

www.ti.com

SLLS545E –NOVEMBER 2002–REVISED MARCH 2010

INDUSTRIAL CAN TRANSCEIVER

Check for Samples: SN55HVD251, SN65HVD251

FEATURES

DESCRIPTION

• Drop-In Improved Replacement for the

The HVD251 is intended for use in applications

PCA82C250 and PCA82C251

employing the Controller Area Network (CAN) serial

communication physical layer in accordance with the

• Bus-Fault Protection of ±36 V

ISO 11898 Standard. The HVD251 provides

• Meets or Exceeds ISO 11898

differential transmit capability to the bus and

• Signaling Rates

(1)

Up to 1 Mbps

differential receive capability to a CAN controller at

speeds up to 1 megabits per second (Mbps).

• High Input Impedance Allows up to 120 Nodes

on a Bus

Designed for operation in harsh environments, the

• Bus Pin ESD Protection Exceeds 14 kV HBM

device features cross-wire, overvoltage and loss of

ground protection to ±36 V. Also featured are

• Unpowered Node Does Not Disturb the Bus

overtemperature protection as well as -7 V to 12 V

• Low-Current Standby Mode — 200 µA Typical

common-mode range, and tolerance to transients of

• Thermal Shutdown Protection

±200 V. The transceiver interfaces the single-ended

CAN controller with the differential CAN bus found in

• Glitch-Free Power-Up and Power-Down Bus

industrial, building automation, and automotive

Protection For Hot-Plugging

applications.

• DeviceNet Vendor ID # 806

Rs, pin 8, selects one of three different modes of

(1)

The signaling rate of a line is the number of voltage

operation: high-speed, slope control, or low-power

transitions that are made per second expressed in bps (bits

mode. The high-speed mode of operation is selected

per second).

by connecting pin 8 to ground, allowing the

transmitter output transistors to switch as fast as

APPLICATIONS

possible with no limitation on the rise and fall slope.

• CAN Data Buses

The rise and fall slope can be adjusted by connecting

• Industrial Automation

a resistor to ground at pin 8; the slope is proportional

• SAE J1939 Standard Data Bus Interface

to the pin's output current. Slope control with an

external resistor value of 10 kΩ gives ~ 15 V/µs slew

• NMEA 2000 Standard Data Bus Interface

rate; 100 kΩ gives ~ 2 V/µs slew rate.

If a high logic level is applied to the Rs pin 8, the

device enters a low-current standby mode where the

driver is switched off and the receiver remains active.

The local protocol controller returns the device to the

normal mode when it transmits to the bus.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (27 pages)

PAGE 1
SN55HVD251 SN65HVD251 www.ti.com D DRJ SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 P INDUSTRIAL CAN TRANSCEIVER Check for Samples: SN55HVD251, SN65HVD251 FEATURES DESCRIPTION • The HVD251 is intended for use in applications employing the Controller Area Network (CAN) serial communication physical layer in accordance with the ISO 11898 Standard.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 THERMAL CHARACTERISTICS PARAMETER qJB TEST CONDITIONS Junction-to-board thermal resistance MIN TYP D 78.7 P 48.9 DRJ qJC Junction-to-case thermal resistance TSD Device power dissipation UNITS °C/W 73 D 44.6 P 66.6 DRJ PD MAX °C/W 52 VCC = 5 V, Tj = 27°C, RL = 60Ω, RS at 0 V, Input to D a 500-kHz 50% duty cycle square wave 97.7 mW VCC = 5.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com DRIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted). PARAMETER VO(D) VO(R) VOD(D) TEST CONDITIONS Bus output voltage (Dominant) CANH Bus output voltage (Recessive) CANH CANL CANL Differential output voltage (Dominant) MIN TYP (1) 2.75 Figure 1 and Figure 2 , D at 0 V Rs at 0 V, T ≥ -40°C MAX UNIT 3.5 4.5 0.5 Figure 1 and Figure 2 , D at 0.7VCC, Rs at 0 V, 2 2 2.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted).
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com PARAMETER MEASUREMENT INFORMATION IO(CANH) VO(CANH) D VOD II IIRs Rs VI 60 W + 1% + VO(CANH) + VO(CANL) 2 VOC IO(CANL) VI(Rs) _ VO(CANL) Figure 1. Driver Voltage, Current, and Test Definition Dominant Recessive 93.5 V VO(CANH) 92.5 V 91.5 V VO(CANL) Figure 2. Bus Logic State Voltage Definitions CANH D VOD VI RNODE 60 W ± 1% + _ RS CANL –7 V ≤ VTEST ≤ 12 V RNODE Figure 3.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 CANH D VI RL = 60 W ±1% + VI(Rs) _ Rs (see Note A) CL = 50 pF ±20% (see Note B) VO CANL VCC VCC/2 VI VCC/2 0V tPHL tPLH 0.9V VO 90% 10% tr VO(D) 0.5V VO(R) tf Figure 4. Driver Test Circuit and Voltage Waveforms CANH R VI(CANH) VI(CANH) + VI(CANL) VIC = 2 VI(CANL) IO VID VO CANL Figure 5. Receiver Voltage and Current Definitions CANH R VI CANL (see Note A) 1.5 V IO CL = 15 pF +20% (see Note B) VO 3.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com CANH R CANL 100 W Pulse Generator 15 ms Duration 1% Duty Cycle tr, tr 3 100 ns D at 0 V or VCC RS at 0 V or VCC A. This test is conducted to test survivability only. Data stability at the R output is not specified. Figure 7. Test Circuit, Transient Overvoltage Test Table 1. Receiver Characteristics Over Common Mode Voltage INPUT DIFFERENTIAL INPUT OUTPUT VCANH VCANL |VID| 12 V 11.1 V 900 mV L R -6.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 CANH 27 W 1% D VI CANL 27 W 1% RS 50 pF 20% VOC VOC(PP) VOC A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr ≤ 6ns, tf ≤ 6ns, ZO = 50Ω. Figure 9. Peak-to-Peak Common Mode Output Voltage DUT CANH VI D 60 W + 1% 10 kW or 100 kW + 5% _ RS CANL VRs + R + VO _ 15 pF + 20% VCC 50% D Input 0V tLoop2 tLoop1 VOH 0.7 Vcc R Output 0.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com IOS 0 V or VCC CANH D CANL Rs Vin –7 V or 12 V JIOS(SS)J JIOS(P)J 15 s 0V 12 V Vin 0V 10 ms or 0V Vin –7 V Figure 11. Driver Short-Circuit Test CANH R VI (see Note A) CANL CL = 15 pF 1.5 V VO (see Note B) 3.5 V 2.4 V VI 1.5 V tp(sb) VOH VO 0.3 VCC VOL A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr ≤ 6ns, tf ≤ 6ns, ZO = 50 Ω. B.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 DEVICE INFORMATION 5V R2+1% R1+1% CANH + R VID – CANL Vac R1+1% VI R2+1% VID R1 R2 500 mV 50 W 450 W 900 mV 50 W 227 W 12 V VI –7 V A. All input pulses are supplied by a generator having the following characteristics: fIN < 1.5 MHz, TA = 25°C, VCC = 5 V. B. The receiver output should not change state during application of the common-mode input waveform. Figure 13.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com D Input R Output Vcc Vcc 100 kW 1 kW 15 W Input Output 9V 9V CANL Input CANH Input Vcc 110 kW Vcc 110 kW 9 kW 45 kW 9 kW 45 kW Input Input 40 V 9 kW 40 V CANH and CANL Outputs 9 kW Rs Input Vcc Vcc Output 40 V + Input Figure 14.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 TYPICAL CHARACTERISTICS RECESSIVE-TO-DOMINANT LOOP DELAY vs FREE-AIR TEMPERATURE DOMINANT-TO-RECESSIVE LOOP DELAY vs FREE-AIR TEMPERATURE SUPPLY CURRENT (RMS) vs SIGNALING RATE 150 33 72 tLOOP2 – Loop Time – ns VCC = 4.5 V VCC = 5 V 70 68 66 VCC = 5.5 V VCC = 5.5 V VCC = 5 V 140 135 130 VCC = 4.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com APPLICATION INFORMATION The basics of bus arbitration require that the receiver at the sending node designate the first bit as dominant or recessive after the initial wave of the first bit of a message travels to the most remote node on a network and back again.
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 An eye pattern is a useful tool for measuring overall signal quality. As displayed in Figure 24, the differential signal changes logic states in two places on the display, producing an eye. Instead of viewing only one logic crossing on the scope, an entire bit of data is brought into view.
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SN55HVD251 SN65HVD251 SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 www.ti.com REVISION HISTORY Changes from Original (November 2002) to Revision A • Page Changed multiple items within the document. ...................................................................................................................... 1 Changes from Revision A (September 2003) to Revision B Page • Changed the front page format. ...........................................................................................
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SN55HVD251 SN65HVD251 www.ti.com SLLS545E – NOVEMBER 2002 – REVISED MARCH 2010 • Changed Table 1 header From: MEASURED To: DIFFERENTIAL INPUT ......................................................................... 8 • Added Note B to Figure 13 ................................................................................................................................................. 11 • Added a row ( X Open) to Table 2 - Driver ..................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-Dec-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN55HVD251DRJR SON DRJ 8 1000 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 SN65HVD251DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-Dec-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN55HVD251DRJR SON DRJ 8 1000 210.0 185.0 35.0 SN65HVD251DR SOIC D 8 2500 340.5 338.1 20.
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