Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - transceivers LIN 1/1 SOIC 8

RXD

TXD

NWake

INH

LIN

GND

Receiver

Filter

SUP

Wake Up, State,

and INH Control

Fault

Detection

and Protection

Driver

With Slope

Control

SUP

Filter

SN65HVDA195-Q1

www.ti.com

SLLS961A –JULY 2009–REVISED OCTOBER 2009

LIN AND MOST ECL PHYSICAL INTERFACE

Check for Samples: SN65HVDA195-Q1

FEATURES

• LIN Physical Layer Specification Revision 2.0 • Extended Operation With Supply From 7 V to

Compliant and Conforms to SAEJ2602 27 V DC (LIN Specification 7 V to 18 V)

Recommended Practice for LIN

• Interfaces to Microcontroller With 5-V or 3.3-V

• LIN Bus Speed up to 20-kbps LIN Specified I/O Pins

Maximum and MOST ECL Speeds Down to

• Wake-Up Request on RXD Pin

0 Baud

• Control of External Voltage Regulator (INH Pin)

• Supports ISO9141 (K-Line)

• Integrated Pullup Resistor and Series Diode

• Qualified for Automotive Applications

for LIN Slave Applications

• Sleep Mode: Ultra Low Current Consumption,

• Low Electromagnetic Emission (EME), High

Allows Wake-Up Events From LIN Bus,

Electromagnetic Immunity (EMI)

Wake-Up Input (External Switch), or Host

• Bus Terminal Short Circuit Protected for

Microcontroller

Short to Battery or Short to Ground

• High-Speed Receive Capable

• Thermally Protected

• ESD Protection to ±12 kV (Human-Body Model)

• Ground Disconnection Fail Safe at System

on LIN Pin

Level

• LIN Pin Handles Voltage From –40 V to 40 V

• Ground Shift Operation at System Level

• Survives Transient Damage in Automotive

• Unpowered Node Does Not Disturb the

Environment (ISO 7637)

Network

FUNCTIONAL BLOCK DIAGRAM

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (21 pages)

PAGE 1
SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 LIN AND MOST ECL PHYSICAL INTERFACE Check for Samples: SN65HVDA195-Q1 FEATURES 1 • • • • • • • • • LIN Physical Layer Specification Revision 2.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.com DESCRIPTION The SN65HVDA195 is the Local Interconnect Network (LIN) physical interface and MOST ECL interface, which integrates the serial transceiver with wake-up and protection features. The bus is a single-wire bidirectional bus typically used for low-speed in-vehicle networks using data rates to 20 kbps. The device can transmit with an effective data rate of 0 kbps since it does not have dominant state time out.
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SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 Local Interconnect Network (LIN) Bus This I/O pin is the single-wire LIN bus transmitter and receiver. Transmitter Characteristics The driver is a low-side transistor with internal current limitation and thermal shutdown. There is an internal 30-kΩ pullup resistor with a serial diode structure to VSUP, so no external pullup components are required for LIN slave mode applications.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.com Enable Input (EN) EN controls the operation mode of the SN65HVDA195 (normal or sleep mode). When EN is high, the SN65HVDA195 is in normal mode allowing a transmission path from TXD to LIN and from LIN to RXD. When EN is low the device is put into sleep mode and there are no transmission paths available. The device can enter normal mode only after being woken up.
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SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 Table 1.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.com EN Vsup INH High Impedance TXD t > tgo_to_operate Vsup LIN Floating RXD Sleep MODE Normal Figure 2. Wake-Up Via EN LIN 0.6 × VSUP 0.4 × VSUP 0.6 × VSUP Vsup 0.4 × VSUP t < tLINBUS tLINBUS Vsup INH High Impedance TXD t > tgo_to_operate EN RXD MODE Floating Sleep Standby Normal Figure 3.
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SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 NWake VIL NWake VIH NWake VIL NWake Vsup t < tNWake INH tNWake Vsup High Impedance TXD t > tgo_to_operate EN RXD Floating Vsup LIN MODE Sleep Standby Normal Figure 4.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) PARAMETER (2) RATING Supply line supply voltage (3) 1.1 VSUP 0 to 40 1.2 VNWake NWake dc and transient input voltage (through serial resistor) 1.3 INWake NWake current if due to ground shifts VNWake ≤ VGND – 0.3 V, thus the current into NWake must be limited via a serial resistance. 1.4 VINH INH voltage 1.
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SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 ELECTRICAL CHARACTERISTICS VSUP = 7 V to 27 V, TA = –40°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT SUPPLY Device is operational beyond the LIN 2.0 defined nominal supply line voltage range of 7 V ≤ VSUP ≤ 18 V 7 14 27 Normal and standby modes 7 14 18 Sleep mode 7 12 18 4.8 6.0 2.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VSUP = 7 V to 27 V, TA = –40°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT LIN PIN (Referenced to VSUP) 5.1 VOH High-level output voltage LIN recessive, TXD = High, IO = 0 mA, VSUP = 14 V 5.2 VOL Low-level output voltage LIN dominant, TXD = Low, IO = 40 mA, VSUP = 14 V 0 5.
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SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 ELECTRICAL CHARACTERISTICS (continued) VSUP = 7 V to 27 V, TA = –40°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT AC CHARACTERISTICS 10.1 10.2 10.3 D1 D2 D3 Duty cycle 1 (4) THREC(max) = 0.744 × VSUP, THDOM(max) = 0.581 × VSUP, VSUP = 7 V to 18 V, tBIT = 50 μs (20 kbps), D1 = tBus_rec(min)/ (2 × tBIT). See Figure 5 Duty cycle 2 (4) THREC(min) = 0.422 × VSUP, THDOM(min) = 0.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.com TIMING DIAGRAMS tBit tBit RECESSIVE D = 0.5 TXD (Input) DOMINANT THRec(max) LIN Bus Signal Thresholds : Worst case 1 THDom(max) Vsup THRec(min) Thresholds : Worst case 2 THDom(min) tBus_dom(max) tBus_rec(max) D = tBus_rec(min)/(2 x tBit) RXD D1 (20 kbps) and D3 (10 kbps) case tBus_dom(min) tBus_rec(min) D = tBus_rec(max)/(2 x tBit) RXD D2 (20 kbps) and D4 (10 kbps) case Figure 5.
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SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 TIMING DIAGRAMS (continued) VCC RRXD INH RXD CRXD VSUP 100 nF EN RLIN NWake LIN CLIN TXD GND Figure 7.
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SN65HVDA195-Q1 SLLS961A – JULY 2009 – REVISED OCTOBER 2009 www.ti.
PAGE 15
SN65HVDA195-Q1 www.ti.com SLLS961A – JULY 2009 – REVISED OCTOBER 2009 Device Comparison: TPIC1021A vs SN65HVDA195 The SN65HVDA195 is pin-to-pin compatible to the TPIC1021 and TPIC1021A devices. The SN65HVDA195 is functionally equivalent to the TPIC1021A but with the TXD dominant state timeout protection removed. Table 2 is a summary of the differences between the two devices. Table 2.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) SN65HVDA195QDRQ1 ACTIVE Package Type Package Pins Package Drawing Qty SOIC D 8 2500 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU NIPDAU Level-1-260C-UNLIM (4) -40 to 125 A195Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN65HVDA195QDRQ1 Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65HVDA195QDRQ1 SOIC D 8 2500 367.0 367.0 35.
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