Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - receivers RS422, RS423, RS485 0/4 SOIC 16 N

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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Designed for TIA/EIA-485, TIA/EIA-422, and

ISO 8482 Applications

D Signaling Rate

Exceeding 50 Mbps

D Fail-Safe in Bus Short-Circuit, Open-Circuit,

and Idle-Bus Conditions

D ESD Protection on Bus Inputs 6 kV

D Common-Mode Bus Input Range

−7 V to 12 V

D Propagation Delay Times <16 ns

D Low Standby Power Consumption <20 µA

D Pin-Compatible Upgrade for MC3486,

DS96F175, LTC489, and SN75175

description

The SN65LBC175A and SN75LBC175A are

quadruple differential line receivers with 3-state

outputs, designed for TIA/EIA-485 (RS-485),

TIA/EIA-422 (RS-422), and ISO 8482 (Euro

RS-485) applications.

These devices are optimized for balanced

multipoint bus communication at data rates up to

and exceeding 50 million bits per second. The

transmission media may be twisted-pair cables,

printed-circuit board traces, or backplanes. The

ultimate rate and distance of data transfer is

dependent upon the attenuation characteristics of

the media and the noise coupling to the

environment.

Each receiver operates over a wide range of positive and negative common-mode input voltages, and features

ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh

environments. These devices are designed using LinBiCMOSt, facilitating low power consumption and

inherent robustness.

Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers

with the same signal.

The SN75LBC175A is characterized for operation over the temperature range of 0°C to 70°C. The

SN65LBC175A is characterized over the temperature range from −40°C to 85°C.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

LinBiCMOS is a trademark of Texas Instruments.

The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

1,2EN

GND

3,4EN

SN65LBC175A (Marked as 65LBC175A)

SN75LBC175A (Marked as 75LBC175A)

D or N PACKAGE

(TOP VIEW)

logic diagram

1,2EN

3,4EN

Summary of content (16 pages)

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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 D Designed for TIA/EIA-485, TIA/EIA-422, and D D D D D D D ISO 8482 Applications Signaling Rate1 Exceeding 50 Mbps Fail-Safe in Bus Short-Circuit, Open-Circuit, and Idle-Bus Conditions ESD Protection on Bus Inputs 6 kV Common-Mode Bus Input Range −7 V to 12 V Propagation Delay Times <16 ns Low Standby Power Consumption <20 µA Pin-Compatible Upgrade for MC3486, DS96F175, LTC489, and SN75175 descri
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 FUNCTION TABLE (each receiver) DIFFERENTIAL INPUTS A – B (VID) ENABLE EN OUTPUT Y VID ≤ −0.2 V −0.2 V < VID < −0.01 V H L H ? −0.
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 absolute maximum ratings† over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V Voltage range at any bus input (steady state), A and B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 electrical characteristics over recommended operating conditions PARAMETER TEST CONDITIONS VIT+ Positive-going differential input voltage threshold VIT− Negative-going differential input voltage threshold VHYS VIK Hysteresis voltage (VIT+ − VIT−) VOH High-level output voltage −7 V < VCM < 12 V (VCM = (VA + VB ) / 2 ) Input clamp voltage II = −18 mA VID = 200 mV, IOH = −8 mA VOL Low-le
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 PARAMETER MEASUREMENT INFORMATION VA IO VID VB VO Figure 1. Voltage and Current Definitions Generator 50 Ω Input B A 3V 1.5 V Y 1.5 V Input A B 0V tPLH Generator 50 Ω CL = 15 pF (Includes Probe and Jig Capacitance) Output Y tPHL 90% 10% 1.5 V tr VOH 90% 10% VOL tf Generators: PRR = 1 MHz, 50% Duty Cycle, tr <6 ns, Zo = 50 Ω Figure 2.
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 PARAMETER MEASUREMENT INFORMATION VCC A −1.5 V Y 1 kΩ B EN CL = 15 pF (Includes Probe and Jig Capacitance) 3V EN 1.5 V 1.5 V 0V tPLZ tPZL Generator VCC 50 Ω Y 1.5 V VOL + 0.5 V VOL Generators: PRR = 1 MHz, 50% Duty Cycle, tr <6 ns, Zo = 50 Ω Figure 4. Test Circuit Waveforms, tPZL and tPLZ 100 Ω VTEST 0V Pulse Generator, 15 µs Duration, 1% Duty Cycle 15 µs 1.5 ms Figure 5.
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 TYPICAL CHARACTERISTICS BUS INPUT CURRENT vs BUS INPUT VOLTAGE OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 800 6 VCC = 5 V TA = 25°C 600 5 400 VO − Output Voltage − V Bus Input Current − µ A VCC = 0 V VCC = 5 V 200 0 −200 VIC = −7 V VIC = 0 V VIC = 12 V 4 VIC = −7 V VIC = 0 V VIC = 12 V 3 2 1 −400 −600 −10 −5 0 5 10 0 −150 15 −100 Bus Input Voltage − V −50 0 50 Differe
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 TYPICAL CHARACTERISTICS 500 mV A, B −500 mV 20 ns 5V Y 0V Figure 10.
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SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009 APPLICATION INFORMATION TMS320F243 DSP (Controller) SN65LBC174A SN65LBC175A TMS320F241 DSP (Embedded Application) SPISIMO SPISIMO IOPA1 (Enable) IOPA1 SPISTE SPISTE SPICLK SPICLK IOPA2 (Enable) IOPA2 IOPA0 (Handshake /Status) IOPA0 SPISOMI SPISOMI Figure 11.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65LBC175ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN75LBC175ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65LBC175ADR SOIC D 16 2500 333.2 345.9 28.6 SN75LBC175ADR SOIC D 16 2500 333.2 345.9 28.
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