Datasheet

1
FEATURES
DESCRIPTION
1
2
3
4
8
7
6
5
V
CC
R
D
GND
A
B
Z
Y
SN65LVDM179D (Marked as DM179 or LVM179)
SN65LVDM179DGK (Marked as M79)
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
R
RE
DE
D
GND
GND
V
CC
V
CC
A
B
Z
Y
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1R
RE
2R
2A
2B
GND
V
CC
1D
1Y
1Z
DE
2Z
2Y
2D
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1R
1DE
2R
2A
2B
GND
V
CC
1D
1Y
1Z
2DE
2Z
2Y
2D
SN65LVDM180D (Marked as LVDM180)
SN65LVDM180PW (Marked as LVDM180)
(TOP VIEW)
SN65LVDM050D (Marked as LVDM050)
SN65LVDM050PW (Marked as LVDM050)
(TOP VIEW)
SN65LVDM051D (Marked as LVDM051)
SN65LVDM051PW (Marked as LVDM051)
(TOP VIEW)
R
D
Y
Z
A
B
R
D
Y
Z
A
B
DE
RE
2
3
2
5
4
3
5
6
8
7
9
10
12
11
2D
1D
1Y
1Z
2Y
2Z
DE
9
15
12
14
13
10
11
2R
1R
1A
1B
2A
2B
RE
5
3
4
2
1
6
7
1R
1D
1Y
1Z
1A
1B
1DE
3
15
4
14
13
2
1
2R
2D
2Y
2Z
2A
2B
2DE
5
9
12
10
11
6
7
SN65LVDM179 , SN65LVDM180
SN65LVDM050 , SN65LVDM051
www.ti.com .................................................................................................................................................... SLLS324J – DECEMBER 1998 – REVISED JULY 2009
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
• Low-Voltage Differential 50- Ω Line Drivers and
Receivers
• Typical Full-Duplex Signaling Rates of 100
Mbps (See Table 1 )
• Bus-Terminal ESD Exceeds 12 kV
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical
Output Voltages of 340 mV With a 50- Ω Load
• Valid Output With as Little as 50-mV Input
Voltage Difference
• Propagation Delay Times
– Driver: 1.7 ns Typical
– Receiver: 3.7 ns Typical
• Power Dissipation at 200 MHz
– Driver: 50 mW Typical
– Receiver: 60 mW Typical
• LVTTL Input Levels Are 5-V Tolerant
• Driver Is High Impedance When Disabled or
With V
CC
< 1.5 V
• Receiver Has Open-Circuit Failsafe
The SN65LVDM179, SN65LVDM180,
SN65LVDM050, and SN65LVDM051 are differential
line drivers and receivers that use low-voltage
differential signaling (LVDS) to achieve high signaling
rates. These circuits are similar to TIA/EIA-644
standard compliant devices (SN65LVDS)
counterparts, except that the output current of the
drivers is doubled. This modification provides a
minimum differential output voltage magnitude of 247
mV across a 50- Ω load simulating two transmission
lines in parallel. This allows having data buses with
more than one driver or with two line termination
resistors. The receivers detect a voltage difference of
50 mV with up to 1 V of ground potential difference
between a transmitter and receiver.
The intended application of these devices and
signaling techniques is point-to-point half duplex,
baseband data transmission over a controlled
impedance media of approximately 100 Ω
characteristic impedance.
1
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998 – 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.