Datasheet

1
FEATURES
DESCRIPTION
R
D
Y
Z
A
B
R
D
Y
Z
A
B
DE
RE
2
3
2
5
4
3
5
6
8
7
9
10
12
11
2D
1D
1Y
1Z
2Y
2Z
DE
9
15
12
14
13
10
11
2R
1R
1A
1B
2A
2B
RE
5
3
4
2
1
6
7
1R
1D
1Y
1Z
1A
1B
1DE
3
15
4
14
13
2
1
2R
2D
2Y
2Z
2A
2B
2DE
5
9
12
10
11
6
7
1
2
3
4
8
7
6
5
V
CC
R
D
GND
A
B
Z
Y
SN65LVDS179D (Marked as DL179 or LVD179)
SN65LVDS179DGK (Marked as S79)
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
R
RE
DE
D
GND
GND
V
CC
V
CC
A
B
Z
Y
NC
SN65LVDS180D (Marked as LVDS180)
SN65LVDS180PW (Marked as LVDS180)
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1R
RE
2R
2A
2B
GND
V
CC
1D
1Y
1Z
DE
2Z
2Y
2D
SN65LVDS050D (Marked as LVDS050)
SN65LVDS050PW (Marked as LVDS050)
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1R
1DE
2R
2A
2B
GND
V
CC
1D
1Y
1Z
2DE
2Z
2Y
2D
SN65LVDS051D (Marked as LVDS051)
SN65LVDS051PW (Marked as LVDS051)
(TOP VIEW)
SN65LVDS179 , , SN65LVDS180
SN65LVDS050 , SN65LVDS051
www.ti.com ............................................................................................................................................................ SLLS301P – APRIL 1998 – REVISED APRIL 2009
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
• Full-Duplex Signaling Rates up to 100 Mbps
(See Table 1 )
• Bus-Terminal ESD Exceeds 12 kV
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With Typical
Output Voltages of 350 mV and a 100- Ω Load
• Propagation Delay Times
– Driver: 1.7 ns Typ
– Receiver: 3.7 ns Typ
• Power Dissipation at 200 MHz
– Driver: 25 mW Typical
– Receiver: 60 mW Typical
• LVTTL Input Levels Are 5-V Tolerant
• Receiver Maintains High Input Impedance With
V
CC
< 1.5 V
• Receiver Has Open-Circuit Fail Safe
The SN65LVDS179, SN65LVDS180, SN65LVDS050,
and SN65LVDS051 are differential line drivers and
receivers that use low-voltage differential signaling
(LVDS) to achieve signaling rates as high as 400
Mbps (see the Application Information section). The
TIA/EIA-644 standard compliant electrical interface
provides a minimum differential output voltage
magnitude of 247 mV into a 100- Ω load and receipt
of 50-mV signals with up to 1 V of ground potential
difference between a transmitter and receiver.
The intended application of this device and signaling
technique is for point-to-point baseband data
transmission over controlled impedance media of
approximately 100- Ω characteristic impedance. The
transmission media may be printed-circuit board
traces, backplanes, or cables. (Note: The ultimate
rate and distance of data transfer depends on the
attenuation characteristics of the media, the noise
coupling to the environment, and other application
specific characteristics).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998 – 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.