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FEATURES DESCRIPTION

APPLICATIONS

1 Y

1 Z

2 Y

2 Z

3 Y

3 Z

4 Y

4 Z

LOGIC DIAGRAM (POSITIVE LOGIC)

SN65MLVD047

SLLS606A – MARCH 2004 – REVISED JULY 2005

MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER

• Differential Line Drivers for 30- Ω to 55- Ω

The SN65MLVD047 is a quadruple line driver. The

Loads and Data Rates

(1)

Up to 200 Mbps,

output current of this device has been increased, in

Clock Frequencies up to 100 MHz

comparison to standard LVDS compliant devices, in

order to support doubly terminated transmission lines

• Supports Multipoint Bus Architectures

and heavily loaded backplane bus applications.

• Operates from a Single 3.3-V Supply

Backplane applications generally require impedance

• Characterized for Operation from –40 ° C to

matching termination resistors at both ends of the

85 ° C

bus. The effective impedance of a doubly terminated

bus can be as low as 30 Ω due to the bus

• 16-Pin SOIC (JEDEC MS-012) and 16-Pin

terminations, as well as the capacitive load of bus

TSSOP (JEDEC MS-153) Packaging

interface devices. SN65MLVD047 drivers allow for

operation with loads as low as 30 Ω . The

SN65MLVD047 devices allow for multiple drivers to

• Clock Distribution

be present on a single bus. Driver edge rate control is

• Backplane or Cabled Multipoint Data Trans-

incorporated to support operation. The

mission in Telecommunications, Automotive,

SN65MLVD047 provides 9-kV ESD protection on all

Industrial, and Other Computer Systems

bus pins.

• Cellular Base Stations

• Central-Office and PBX Switching

• Bridges and Routers

• Low-Power High-Speed Short-Reach Alterna-

tive to TIA/EIA-485

(1)

(1) The data rate of a line is the number of voltage transitions that

are made per second expressed in the units bps (bits per

second).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (21 pages)

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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER FEATURES • • • • • DESCRIPTION Differential Line Drivers for 30-Ω to 55-Ω Loads and Data Rates(1) Up to 200 Mbps, Clock Frequencies up to 100 MHz Supports Multipoint Bus Architectures Operates from a Single 3.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 RECOMMENDED OPERATING CONDITIONS (see Figure 1) MIN NOM 3.3 MAX UNIT VCC Supply voltage 3 3.6 V VIH High-level input voltage 2 VCC V VIL Low-level input voltage 0 0.8 V –1.4 3.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 DEVICE ELECTRICAL CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER MIN (1) TYP (2) TEST CONDITIONS MAX UNIT LVTTL (EN, EN, 1A:4A) |IIH| High-level input current VIH = 2 V or VCC 0 |IIL| Low-level input current VIL = GND or 0.8 V 0 Ci Input capacitance VI = 0.4 sin(30E6πt) + 0.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 SWITCHING CHARACTERISTICS over recommended operating conditions unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT tPLH Propagation delay time, low-to-high-level output 1 1.5 2.4 ns tPHL Propagation delay time, high-to-low-level output 1 1.5 2.4 ns tr Differential output signal rise time 1 1.9 ns tf Differential output signal fall time 1 1.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION VCC IY Y II D VYZ IZ VY Z VI VOS VZ VY + VZ 2 Figure 1. Driver Voltage and Current Definitions 3.32 kΩ Y + _ 49.9 Ω VYZ D Z -1 V ≤ Vtest ≤ 3.4 V 3.32 kΩ NOTE: All resistors are 1% tolerance. Figure 2. Differential Output Voltage Test Circuit R1 24.9 Ω Y C1 1 pF D ≈ 1.3 V Z ≈ 0.7 V VOS(PP) Z C2 1 pF Y R2 24.9 Ω VOS C3 2.5 pF VOS(SS) VOS(SS) A.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION (continued) Y D C1 1 pF C3 0.5 pF R1 Output 50 Ω Z C2 1 pF VCC VCC/2 Input 0V tpLH tpHL VSS 0.9VSS VP(H) Output 0V VP(L) 0.1V SS 0 V SS tf tr A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, frequency = 500 kHz, duty cycle = 50 ± 5%. B. C1, C2, and C3 include instrumentation and fixture capacitance within 2 cm of the D.U.T. and are ±20%. C.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION (continued) Y 0 V or VCC Z 1.62 kΩ , ±1% VY, or VZ Figure 7.
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SN65MLVD047 www.ti.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 TYPICAL CHARACTERISTICS RMS SUPPLY CURRENT vs INPUT FREQUENCY RMS SUPPLY CURRENT vs FREE-AIR TEMPERATURE 65 VCC = 3.3 V, TA = 25 C, EN = VCC, EN = GND, RL = 50 , All Inputs 75 70 I CC − Supply Current − mArms ICC − Supply Current − mArms 80 65 60 50 62 60 25 50 75 100 f − Input Frequency − MHz 125 −40 −15 10 35 60 TA − Free-Air Temperature − °C Figure 9. Figure 10.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 TYPICAL CHARACTERISTICS (continued) DRIVER TRANSITION TIME vs FREE-AIR TEMPERATURE PEAK-TO-PEAK JITTER vs DATA RATE 100 1.7 VCC = 3.3 V, f = 500 kHz, RL = 50 90 80 tf t jit(p-p) − Peak-To-Peak Jitter − ps t r or tf − Rising or Falling Transition Time − ns 1.8 1.6 tr 1.5 1.4 1.3 1.2 −40 −15 10 35 60 70 60 50 40 30 20 10 85 VCC = 3.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 APPLICATION INFORMATION Multipoint Configuration The SN65MLVD047 is designed to allow multipoint communication on a shared bus. Multipoint is a bus configuration with multiple drivers and receivers present. An example is shown in Figure 17. The figure shows transceivers interfacing to the bus, but a combination of drivers, receivers, and transceivers is also possible.
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SN65MLVD047 www.ti.com SLLS606A – MARCH 2004 – REVISED JULY 2005 APPLICATION INFORMATION (continued) Note: Channel 1: VCC, Channel 2: Differential Bus Voltage The output state of the part during this voltage range is independent of the EN and EN pins. In order to insure that data is not corrupted during a live insertion event or the power cycling of an individual node on a multipoint bus it is important to isolate the outputs of the device from the bus until the VCC has reached at least 2.0 VDC.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65MLVD047DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN65MLVD047PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65MLVD047DR SOIC D 16 2500 367.0 367.0 38.0 SN65MLVD047PWR TSSOP PW 16 2000 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.