Datasheet

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SN54ABT240, SN74ABT240A

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS098I – JANUARY 1991 – REVISED JUNE 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Typical V

OLP

(Output Ground Bounce)

<1 V at V

= 5 V, T

= 25°C

High-Drive Outputs (–32-mA I

, 64-mA I

)

off

Supports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

description

These octal buffers and line drivers are designed

specifically to improve both the performance and

density of 3-state memory address drivers, clock

drivers, and bus-oriented receivers and

transmitters. Together with the SN54ABT241,

SN74ABT241A, SN54ABT244, and

SN74ABT244A, these devices provide the choice

of selected combinations of inverting and

noninverting outputs, symmetrical active-low

output-enable (OE

) inputs, and complementary

OE and OE

inputs.

The SN54ABT240 and SN74ABT240A are

organized as two 4-bit buffers/line drivers with

separate OE

inputs. When OE is low, the devices

pass inverted data from the A inputs to the Y

outputs. When OE

is high, the outputs are in the

high-impedance state.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74ABT240AN SN74ABT240AN

SOIC DW

Tube SN74ABT240ADW

ABT240A

Cto85

SOIC

–

Tape and reel SN74ABT240ADWR

ABT240A

–

40°C

85°C

SOP – NS Tape and reel SN74ABT240ANSR ABT240A

SSOP – DB Tape and reel SN74ABT240ADBR AB240A

TSSOP – PW Tape and reel SN74ABT240APWR AB240A

CDIP – J Tube SNJ54ABT240J SNJ54ABT240J

–55°C to 125°C

CFP – W Tube SNJ54ABT240W SNJ54ABT240W

LCCC – FK Tube SNJ54ABT240FK SNJ54ABT240FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN54ABT240 ...J OR W PACKAGE

SN74ABT240A . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54ABT240 . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2 2OE

2Y1

GND

2A1

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (20 pages)

PAGE 1
SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I – JANUARY 1991 – REVISED JUNE 2002 D D D D SN54ABT240 . . . J OR W PACKAGE SN74ABT240A . . .
PAGE 2
SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I – JANUARY 1991 – REVISED JUNE 2002 description (continued) This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
PAGE 3
SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I – JANUARY 1991 – REVISED JUNE 2002 recommended operating conditions (see Note 3) SN54ABT240 VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current ∆t/∆v Input transition rise or fall rate High-level input voltage SN74ABT240A MIN MAX MIN MAX 4.5 5.5 4.5 5.5 2 2 0.8 Input voltage 0 Low-level output current Outputs enabled 0 V V 0.
PAGE 4
SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I – JANUARY 1991 – REVISED JUNE 2002 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54ABT240 PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y VCC = 5 V, TA = 25°C MIN TYP MAX MIN MAX 1 2.9 4.3 0.8 5.5 1.6 3.1 4.5 1 5.5 1.1 3.1 5.8 0.8 7.5 1.1 2.7 6.2 0.8 7.
PAGE 5
SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I – JANUARY 1991 – REVISED JUNE 2002 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V 1.5 V Input 1.5 V Data Input 0V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 3V 1.5 V Input Output Control 1.5 V 0V 1.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ABT240ADBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74ABT240ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ABT240ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ABT240ADBR SN74ABT240ADWR SSOP DB 20 2000 367.0 367.0 38.0 SOIC DW 20 2000 367.0 367.0 45.0 SN74ABT240ANSR SO NS 20 2000 367.0 367.0 45.0 SN74ABT240APWR TSSOP PW 20 2000 367.0 367.0 38.
PAGE 11
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 20
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.