Datasheet

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SN54ABT540, SN74ABT540

OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

State-of-the-Art

EPIC-

ΙΙ

 BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical V

OLP

(Output Ground Bounce) < 1 V

at V

= 5 V, T

= 25°C

High-Drive Outputs (–32-mA I

, 64-mA I

)

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK),

Plastic (N) and Ceramic (J) DIPs, and

Ceramic Flat (W) Package

description

The ’ABT540 octal buffers and line drivers are

ideal for driving bus lines or buffer memory

address registers. The devices feature inputs and

outputs on opposite sides of the package that

facilitate printed circuit board layout.

The 3-state control gate is a 2-input AND gate with

active-low inputs so that if either output-enable

(OE1

or OE2) input is high, all corresponding

outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT540 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT540 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUT

OE1 OE2 A

L L L H

L LH L

H XX Z

X H X Z

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

OE1

GND

OE2

SN54ABT540 ...J OR W PACKAGE

SN74ABT540 . . . DB, DW, N, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

SN54ABT540 . . . FK PACKAGE

(TOP VIEW)

OE1

Y6 OE2

GND

Summary of content (9 pages)

PAGE 1
SN54ABT540, SN74ABT540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D SN54ABT540 . . . J OR W PACKAGE SN74ABT540 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW) OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 SN54ABT540 . . . FK PACKAGE (TOP VIEW) description The ’ABT540 octal buffers and line drivers are ideal for driving bus lines or buffer memory address registers.
PAGE 2
SN54ABT540, SN74ABT540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997 logic symbol† 1 OE1 logic diagram (positive logic) OE1 & 19 EN OE2 A1 A2 A3 A4 A5 A6 A7 A8 2 1 OE2 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 Y1 A1 1 19 2 18 Y1 Y2 Y3 Y4 To Seven Other Channels Y5 Y6 Y7 Y8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PAGE 3
SN54ABT540, SN74ABT540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = –18 mA IOH = –3 mA VCC = 5 V, VCC = 4 4.5 5V VOL VCC = 4 4.5 5V Vhys II TA = 25°C TYP† MAX SN54ABT540 MIN –1.2 MAX SN74ABT540 MIN –1.2 MAX –1.2 2.5 2.5 2.
PAGE 4
SN54ABT540, SN74ABT540 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V 1.5 V Input 1.5 V 0V Data Input 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 3V 1.5 V Input 1.5 V 0V VOH 1.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ABT540DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74ABT540DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ABT540NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ABT540DBR SSOP DB 20 2000 346.0 346.0 33.0 SN74ABT540DWR SOIC DW 20 2000 346.0 346.0 41.0 SN74ABT540NSR SO NS 20 2000 346.0 346.0 41.
PAGE 9
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