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ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver TSSOP 24

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SCBS159E − JANUARY 1991 − REVISED APRIL 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D State-of-the-Art EPIC-ΙΙB BiCMOS Design

Significantly Reduces Power Dissipation

D Flow-Through Architecture Optimizes PCB

Layout

D Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

D Typical V

OLP

(Output Ground Bounce) < 1 V

at V

= 5 V, T

= 25°C

D High-Impedance State During Power Up

and Power Down

D High-Drive Outputs (−32-mA I

, 64-mA I

)

D Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages, Ceramic Chip Carriers (FK), and

Plastic (NT) and Ceramic (JT) DIPs

description

These 10-bit buffers or bus drivers provide a

high-performance bus interface for wide data

paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with

active-low inputs so that, if either output-enable

(OE1

or OE2) input is high, all ten outputs are in

the high-impedance state. The ’ABT827 provides

true data at the outputs.

When V

is between 0 and 2.1 V, the device

is in the high-impedance state during power up

or power down. However, to ensure

the high-impedance state above 2.1 V, OE

should

be tied to V

through a pullup resistor; the

minimum value of the resistor is determined by

the current-sinking capability of the driver.

The SN54ABT827 is characterized for operation over the full military temperature range of −55°C to 125°C. The

SN74ABT827 is characterized for operation from −40°C to 85°C.

FUNCTION TABLE

INPUTS

OUTPUT

OE1 OE2 A

OUTPUT

L L L L

L LH H

H XX Z

X H X Z

SN54ABT827 . . . JT PACKAGE

SN74ABT827 . . . DB, DW, NT, OR PW PACKAGE

(TOP VIEW)

SN54ABT827...FK PACKAGE

(TOP VIEW)

3212827

12 13

426

14 15 16 17 18

A10

GND

OE2

Y10

OE1

A10

GND

Y10

OE2

NC − No internal connection

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EPIC-ΙΙB is a trademark of Texas Instruments.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (20 pages)

PAGE 1
SCBS159E − JANUARY 1991 − REVISED APRIL 2005 D State-of-the-Art EPIC-ΙΙB BiCMOS Design D D D D D D SN54ABT827 . . . JT PACKAGE SN74ABT827 . . .
PAGE 2
SCBS159E − JANUARY 1991 − REVISED APRIL 2005 logic symbol† 1 OE1 OE2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 13 2 logic diagram (positive logic) OE1 & OE2 EN 1 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 A1 1 13 2 23 Y1 Y1 Y2 To Nine Other Channels Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PAGE 3
SCBS159E − JANUARY 1991 − REVISED APRIL 2005 recommended operating conditions (see Note 3) SN54ABT827 SN74ABT827 MIN MAX MIN MAX 4.5 5.5 4.5 5.
PAGE 4
SCBS159E − JANUARY 1991 − REVISED APRIL 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = −18 mA IOH = −3 mA VCC = 5 V, VCC = 4.5 V VOL Vhys II IOZPU‡ IOZPD‡ IOZH IOZL Ioff ICEX IO¶ VCC = 4.5 V ∆ICC# Ci MIN SN74ABT827 MAX −1.2 MIN −1.2 MAX −1.2 2.5 2.
PAGE 5
SCBS159E − JANUARY 1991 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V Input 1.5 V 1.5 V Data Input 0V 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 3V 3V 1.5 V Input Output Control 1.5 V 0V 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74ABT827DBR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 SN74ABT827DWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1 SN74ABT827PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ABT827DBR SSOP DB 24 2000 367.0 367.0 38.0 SN74ABT827DWR SOIC DW 24 2000 367.0 367.0 45.0 SN74ABT827PWR TSSOP PW 24 2000 367.0 367.0 38.
PAGE 11
MECHANICAL DATA MCER004A – JANUARY 1995 – REVISED JANUARY 1997 JT (R-GDIP-T**) CERAMIC DUAL-IN-LINE 24 LEADS SHOWN PINS ** A 13 24 B 1 24 28 A MAX 1.280 (32,51) 1.460 (37,08) A MIN 1.240 (31,50) 1.440 (36,58) B MAX 0.300 (7,62) 0.291 (7,39) B MIN 0.245 (6,22) 0.285 (7,24) DIM 12 0.070 (1,78) 0.030 (0,76) 0.100 (2,54) MAX 0.320 (8,13) 0.290 (7,37) 0.015 (0,38) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.014 (0,36) 0.008 (0,20) 0.
PAGE 12
MECHANICAL DATA MCFP007 – OCTOBER 1994 W (R-GDFP-F24) CERAMIC DUAL FLATPACK 0.375 (9,53) 0.340 (8,64) Base and Seating Plane 0.006 (0,15) 0.004 (0,10) 0.090 (2,29) 0.045 (1,14) 0.045 (1,14) 0.026 (0,66) 0.395 (10,03) 0.360 (9,14) 0.360 (9,14) 0.240 (6,10) 1 0.360 (9,14) 0.240 (6,10) 24 0.019 (0,48) 0.015 (0,38) 0.050 (1,27) 0.640 (16,26) 0.490 (12,45) 0.030 (0,76) 0.015 (0,38) 12 13 30° TYP 1.115 (28,32) 0.840 (21,34) 4040180-5 / B 03/95 NOTES: A. B. C. D. E.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 20
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