Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate OR gate 74ACT TSSOP 14

 

   

SCAS530C − AUGUST 1995 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D 4.5-V to 5.5-V V

Operation

D Inputs Accept Voltages to 5.5 V

D Max t

of 10 ns at 5 V

D Inputs Are TTL-Voltage Compatible

SN54ACT32 ...J OR W PACKAGE

SN74ACT32 . . . D, DB, N, NS, OR PW PACKAGE

(TOP VIEW)

GND

SN54ACT32 . . . FK PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

NC − No internal connection

GND

description/ordering information

The ’ACT32 devices are quadruple 2-input positive-OR gates. The devices perform the Boolean function

Y = A + B or Y = A

• B in positive logic.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube SN74ACT32N SN74ACT32N

SOIC − D

Tube SN74ACT32D

ACT32

SOIC − D

Tape and reel SN74ACT32DR

ACT32

−40°C to 85°C

SOP − NS Tape and reel SN74ACT32NSR ACT32

−40 C to 85 C

SSOP − DB Tape and reel SN74ACT32DBR AD32

TSSOP − PW

Tube SN74ACT32PW

AD32

TSSOP − PW

Tape and reel SN74ACT32PWR

AD32

CDIP − J Tube SNJ54ACT32J SNJ54ACT32J

−55°C to 125°C

CFP − W Tube SNJ54ACT32W SNJ54ACT32W

−55 C to 125 C

LCCC − FK Tube SNJ54ACT32FK SNJ54ACT32FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A B

OUTPUT

H X H

X HH

L L L

    !"#$% !%&% 

 %'(#&% !"(($% & ' )"*+!&% &$, ("! !%'(# 

)$!'!&% )$( $ $(# ' $-& %("#$% &%&( .&((&%/,

("!% )(!$%0 $ % %$!$&(+/ %!+"$ $%0 ' &++

)&(&#$$(,

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (17 pages)

PAGE 1
SCAS530C − AUGUST 1995 − REVISED OCTOBER 2003 D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Max tpd of 10 ns at 5 V D Inputs Are TTL-Voltage Compatible SN54ACT32 . . . J OR W PACKAGE SN74ACT32 . . .
PAGE 2
SCAS530C − AUGUST 1995 − REVISED OCTOBER 2003 logic diagram, each gate (positive logic) A Y B absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SCAS530C − AUGUST 1995 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50 µA A VOH IOH = −24 mA IOH = −50 mA† IOH = −75 mA† SN54ACT32 4.5 V 4.4 4.4 5.5 V 5.4 5.4 5.4 4.5 V 3.86 3.7 3.76 5.5 V 4.86 4.7 4.76 MIN MAX MIN MAX UNIT 4.4 V 3.86 5.5 V IOL = 24 mA SN74ACT32 MIN 5.
PAGE 4
SCAS530C − AUGUST 1995 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION TEST S1 tPLH/tPHL Open From Output Under Test CL = 50 pF (see Note A) S1 Open 1.5 V 1.5 V 0V tPHL tPLH 2 × VCC 500 Ω 3V Input (see Note B) In-Phase Output 50% VCC tPLH tPHL 500 Ω Out-of-Phase Output LOAD CIRCUIT VOH 50% VCC VOL 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN74ACT32DBR SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DB 14 2000 330.0 16.4 8.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.6 2.5 12.0 16.0 Q1 SN74ACT32DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74ACT32NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ACT32DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74ACT32DR SOIC D 14 2500 367.0 367.0 38.0 SN74ACT32NSR SO NS 14 2000 367.0 367.0 38.0 SN74ACT32PWR TSSOP PW 14 2000 367.0 367.0 35.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 17
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