Datasheet

 
   
SCAS534C − AUGUST 1995 − REVISED OCTOBER 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D 4.5-V to 5.5-V V
CC
Operation
D Inputs Accept Voltages to 5.5 V
D Max t
pd
of 10 ns at 5 V
D Inputs Are TTL-Voltage Compatible
SN54ACT86 ... J OR W PACKAGE
SN74ACT86 ... D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
V
CC
4B
4A
4Y
3B
3A
3Y
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
SN54ACT86 . . . FK PACKAGE
(TOP VIEW)
1B 1A NC
3Y 3A
V 4B
2Y
GND
NC
NC − No internal connection
CC
description/ordering information
The ’ACT86 devices are quadruple 2-input exclusive-OR gates. The devices perform the Boolean functions
Y = A  B or Y = A
B + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube SN74ACT86N SN74ACT86N
SOIC − D
Tube SN74ACT86D
ACT86
SOIC − D
Tape and reel SN74ACT86DR
ACT86
−40°C to 85°C
SOP − NS Tape and reel SN74ACT86NSR ACT86
−40 C to 85 C
SSOP − DB Tape and reel SN74ACT86DBR AD86
TSSOP − PW
Tube SN74ACT86PW
AD86
TSSOP − PW
Tape and reel SN74ACT86PWR
AD86
CDIP − J Tube SNJ54ACT86J SNJ54ACT86J
−55°C to 125°C
CFP − W Tube SNJ54ACT86W SNJ54ACT86W
−55 C to 125 C
LCCC − FK Tube SNJ54ACT86FK SNJ54ACT86FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
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Copyright  2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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