Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Multivibrator Monostable 7.5 ns SOIC 16 N

 

   

SCLS352H − JULY 1997 − REVISED OCTOBER 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Operating Range 2-V to 5.5-V V

D Schmitt-Trigger Circuitry On A, B, and CLR

Inputs for Slow Input Transition Rates

D Edge Triggered From Active-High or

Active-Low Gated Logic Inputs

D Retriggerable for Very Long Output Pulses

D Overriding Clear Terminates Output Pulse

D Glitch-Free Power-Up Reset On Outputs

D Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

description/ordering information

The ’AHC123A devices are dual retriggerable

monostable multivibrators designed for 2-V to

5.5-V V

operation.

These edge-triggered multivibrators feature

output pulse-duration control by three methods. In

the first method, the A input is low, and the B input

goes high. In the second method, the B input is

high, and the A

input goes low. In the third method,

the A

input is low, the B input is high, and the clear

(CLR

) input goes high.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube SN74AHC123AN SN74AHC123AN

SOIC − D

Tube SN74AHC123AD

AHC123A

−40°C to 85°C

SOIC − D

Tape and reel SN74AHC123ADR

AHC123A

−40°C to 85°C

SSOP − DB Tape and reel SN74AHC123ADBR HA123A

TSSOP − PW Tape and reel SN74AHC123APWR HA123A

TVSOP − DGV Tape and reel SN74AHC123ADGVR HA123A

CDIP − J Tube SNJ54AHC123AJ SNJ54AHC123AJ

−55°C to 125°C

CFP − W Tube SNJ54AHC123AW SNJ54AHC123AW

−55 C to 125 C

LCCC − FK Tube SNJ54AHC123AFK SNJ54AHC123AFK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54AHC123A ...J OR W PACKAGE

SN74AHC123A . . . D, DB, DGV, N, OR PW PACKAGE

(TOP VIEW)

SN54AHC123A . . . FK PACKAGE

(TOP VIEW)

1CLR

ext

GND

ext

2CLR

3212019

910111213

ext

2CLR

1CLR

ext

GND

NC − No internal connection

ext

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Summary of content (28 pages)

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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 D Operating Range 2-V to 5.5-V VCC D Schmitt-Trigger Circuitry On A, B, and CLR SN54AHC123A . . . J OR W PACKAGE SN74AHC123A . . . D, DB, DGV, N, OR PW PACKAGE (TOP VIEW) Inputs for Slow Input Transition Rates D Edge Triggered From Active-High or D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1Rext/Cext 1Cext 1Q 2Q 2CLR 2B 2A SN54AHC123A . . .
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 description/ordering information (continued) The output pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 logic diagram, each multivibrator (positive logic) Rext/Cext A Cext B Q CLR R Q input/output timing diagram trr A B CLR Rext/Cext Q Q tw tw POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 tw + trr 3
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −4 mA IOH = −8 mA II ICC ICC SN74AHC123A 2V 1.9 2 1.9 1.9 3V 2.9 3 2.9 2.9 4.5 V 4.4 4.5 4.4 4.4 3V 2.58 2.48 2.48 4.5 V 3.94 IOL = 50 mA VOL SN54AHC123A MIN IOH = −50 mA VOH TA = 25°C TYP MAX VCC MIN MAX 3.8 MIN MAX V 3.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point tw CL (see Note A) VCC Inputs or Outputs 50% VCC 50% VCC 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATION VCC Input A (see Note B) 50% VCC 0V VCC Input B (see Note B) 50% VCC 50% VCC 0V 50% VCC VOH In-Phase Output 50% VCC In-Phase Output VOL VOH VOL 50% VCC Out-of-Phase Output 50% VCC VOLTAGE WAVEFORMS DELAY
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 APPLICATION INFORMATION caution in use To prevent malfunctions due to noise, connect a high-frequency capacitor between VCC and GND, and keep the wiring between the external components and Cext and Rext/Cext terminals as short as possible.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 APPLICATION INFORMATION retriggering data The minimum input retriggering time (tMIR) is the minimum time required after the initial signal before retriggering the input. After tMIR, the device retriggers the output. Experimentally, it also can be shown that to retrigger the output pulse, the two adjacent input signals should be tMIR apart, where tMIR = 0.30 × tw.
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SCLS352H − JULY 1997 − REVISED OCTOBER 2005 APPLICATION INFORMATION† 1.00E+09 VCC = 5 V TA = 25°C 1.00E+08 RT = 200k Ω t w − Output Pulse Duration − ns 1.00E+07 RT = 150k Ω 1.00E+06 RT = 80k Ω 1.00E+05 RT = 10k Ω 1.00E+04 RT = 5k Ω 1.00E+03 1.00E+02 RT = 1k Ω 1.00E+01 1.00E+00 1 102 10 103 104 105 106 107 CT − External Timing Capacitance − pF Figure 5.
PAGE 12
SCLS352H − JULY 1997 − REVISED OCTOBER 2005 APPLICATION INFORMATION† OUTPUT PULSE-DURATION CONSTANT vs SUPPLY VOLTAGE MINIMUM TRIGGER TIME vs VCC CHARACTERISTICS 10.00 1.20 Output Pulse-Duration Constant − K t rr − Minimum Retrigger Time − µs RT = 1 kΩ TA = 25°C CT = 0.01 µF 1.00 CT = 1000 pF 0.10 CT = 100 pF 0.01 0 1 2 3 4 5 1.15 RT = 10 kΩ TA = 25°C tW = K × C T × R T 1.10 CT = 1000 pF 1.05 CT = 0.01 µF 1.00 0.95 0.90 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 18-Oct-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.6 2.5 12.0 16.0 Q1 SN74AHC123ADBR SSOP DB 16 2000 330.0 16.4 8.2 SN74AHC123ADGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74AHC123ADR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHC123ADBR SSOP DB 16 2000 367.0 367.0 38.0 SN74AHC123ADGVR TVSOP DGV 16 2000 367.0 367.0 35.0 SN74AHC123ADR SOIC D 16 2500 333.2 345.9 28.6 SN74AHC123APWR TSSOP PW 16 2000 364.0 364.0 27.0 SN74AHC123APWR TSSOP PW 16 2000 367.0 367.0 35.0 SN74AHC123APWRG4 TSSOP PW 16 2000 367.0 367.0 35.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.