Datasheet


   
SCLS323M − MARCH 1996 − REVISED JUNE 2005
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Operating Range of 2 V to 5.5 V
D Max t
pd
of 8 ns at 5 V
D Low Power Consumption, 10-µA Max I
CC
D ±8-mA Output Drive at 5 V
D Schmitt Trigger Action at All Inputs Makes
the Circuit Tolerant for Slower Input Rise
and Fall Time
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
3
2
4
51
AV
CC
Y
B
GND
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
51
AV
CC
Y
B
GND
3
2
4
51
AV
CC
Y
B
GND
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
description/ordering information
The SN74AHC1G86 is a single 2-input exclusive-OR gate. The device performs the Boolean function Y = A ⊕ B
or Y = A
B + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
SOT (SOT-23) − DBV
Reel of 3000 SN74AHC1G86DBVR
A86_
SOT (SOT-23) − DBV
Reel of 250 SN74AHC1G86DBVT
A86_
−40°C to 85°C
SOT (SC-70) − DCK
Reel of 3000 SN74AHC1G86DCKR
AH_
−40 C to 85 C
SOT (SC-70) − DCK
Reel of 250 SN74AHC1G86DCKT
AH_
SOT (SOT-553) − DRL Reel of 4000 SN74AHC1G86DRLR AH_
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
‡
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
A B
OUTPUT
Y
L L L
L HH
H LH
H H L
Copyright  2005, Texas Instruments Incorporated
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