Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Latch Transparent D latch Three-state SOIC 20

SN54AHC373, SN74AHC373

OCTAL TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

SCLS235I – OCTOBER 1995 – REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Operating Range 2-V to 5.5-V V

Latch-Up Performance Exceeds 250 mA Per

JESD 17

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

SN54AHC373 ...J OR W PACKAGE

SN74AHC373 . . . DB, DGV, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

SN54AHC373 . . . FK PACKAGE

(TOP VIEW)

GND

3 2 1 20 19

9 10 11 12 13

GND

description/ordering information

The ’AHC373 devices are octal transparent D-type latches designed for 2-V to 5.5-V V

operation.

When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs

are latched at the logic levels of the D inputs.

A buffered output-enable (OE

) input can be used to place the eight outputs in either a normal logic state (high

or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and increased drive provide the capability to drive bus lines without

interface or pullup components.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74AHC373N SN74AHC373N

SOIC DW

Tube SN74AHC373DW

AHC373

SOIC

–

Tape and reel SN74AHC373DWR

AHC373

Cto85

SOP – NS Tape and reel SN74AHC373NSR AHC373

–

40°C

85°C

SSOP – DB Tape and reel SN74AHC373DBR HA373

TSSOP PW

Tube SN74AHC373PW

HA373

TSSOP

–

Tape and reel SN74AHC373PWR

HA373

TVSOP – DGV Tape and reel SN74AHC373DGVR HA373

CDIP – J Tube SNJ54AHC373J SNJ54AHC373J

–55°C to 125°C

CFP – W Tube SNJ54AHC373W SNJ54AHC373W

LCCC – FK Tube SNJ54AHC373FK SNJ54AHC373FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC373 . . . J OR W PACKAGE SN74AHC373 . . .
PAGE 2
SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 description/ordering information (continued) OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
PAGE 3
SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 recommended operating conditions (see Note 3) SN54AHC373 VCC VIH Supply voltage VCC = 2 V VCC = 3 V High-level input voltage Low-level input voltage VI VO 2 5.5 Output voltage ∆t/∆v 5.5 2.1 V V 0.5 0.9 0.9 1.65 1.65 V 0 5.5 0 5.5 V 0 VCC –50 0 VCC –50 mA VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 3.3 V ± 0.3 V Input transition rise or fall rate 2 UNIT 1.
PAGE 4
SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.
PAGE 5
SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.
PAGE 6
SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC Input 50% VCC 50% VCC 0V th VCC
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.0 Q1 SN74AHC373DBR SSOP DB 20 2000 330.0 16.4 SN74AHC373DGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74AHC373DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHC373DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74AHC373DGVR TVSOP DGV 20 2000 367.0 367.0 35.0 SN74AHC373DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74AHC373NSR SO NS 20 2000 367.0 367.0 45.0 SN74AHC373PWR TSSOP PW 20 2000 367.0 367.0 38.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.