Datasheet

SN54AHC74, SN74AHC74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS255J − DECEMBER 1995 − REVISED JULY 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Operating Range 2-V to 5.5-V V
CC
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1CLR
1D
1CLK
1PRE
1Q
1Q
GND
V
CC
2CLR
2D
2CLK
2PRE
2Q
2Q
SN54AHC74 ...J OR W PACKAGE
SN74AHC74 ...D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2D
NC
2CLK
NC
2PRE
1CLK
NC
1PRE
NC
1Q
1D
1CLR
NC
2Q
2Q
V
2CLR
1Q
GND
NC
SN54AHC74 . . . FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
SN74AHC74 . . . RGY PACKAGE
(TOP VIEW)
114
78
2
3
4
5
6
13
12
11
10
9
2CLR
2D
2CLK
2PRE
2Q
1D
1CLK
1PRE
1Q
1Q
1CLR
2Q
V
GND
CC
description/ordering information
The ’AHC74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset (PRE
) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the
other inputs. When PRE
and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY Tape and reel SN74AHC74RGYR HA74
PDIP − N Tube SN74AHC74N SN74AHC74N
SOIC D
Tube SN74AHC74D
AHC74
SOIC − D
Tape and reel SN74AHC74DR
AHC74
−40°C to 85°C
SOP − NS Tape and reel SN74AHC74NSR AHC74
SSOP − DB Tape and reel SN74AHC74DBR HA74
TSSOP PW
Tube SN74AHC74PW
HA74
TSSOP − PW
Tape and reel SN74AHC74PWR
HA74
TVSOP − DGV Tape and reel SN74AHC74DGVR HA74
CDIP − J Tube SNJ54AHC74J SNJ54AHC74J
−55°C to 125°C
CFP − W Tube SNJ54AHC74W SNJ54AHC74W
55 C
to
125 C
LCCC − FK Tube SNJ54AHC74FK SNJ54AHC74FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

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