Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate AND gate 74AHCT PDIP 14

SN54AHCT08, SN74AHCT08

QUADRUPLE 2-INPUT POSITIVE-AND GATES

SCLS237L − OCTOBER 1995 − REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Inputs Are TTL-Voltage Compatible

D Latch-Up Performance Exceeds 250 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

GND

SN54AHCT08 ...J OR W PACKAGE

SN74AHCT08 ...D, DB, DGV, N, NS,

OR PW PACKAGE

(TOP VIEW)

3212019

910111213

GND

SN54AHCT08 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

SN74AHCT08 . . . RGY PACKAGE

(TOP VIEW)

114

GND

description/ordering information

The ’AHCT08 devices are quadruple 2-input positive-AND gates. These devices perform the Boolean function

Y + A • BorY+ A

) B in positive logic.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QFN − RGY Tape and reel SN74AHCT08RGYR HB08

PDIP − N Tube SN74AHCT08N SN74AHCT08N

SOIC D

Tube SN74AHCT08D

AHCT08

SOIC − D

Tape and reel SN74AHCT08DR

AHCT08

−40°C to 85°C

SOP − NS Tape and reel SN74AHCT08NSR AHCT08

SSOP − DB Tape and reel SN74AHCT08DBR HB08

TSSOP PW

Tube SN74AHCT08PW

HB08

TSSOP − PW

Tape and reel SN74AHCT08PWR

HB08

TVSOP − DGV Tape and reel SN74AHCT08DGVR HB08

CDIP − J Tube SNJ54AHCT08J SNJ54AHCT08J

−55°C to 125°C

CFP − W Tube SNJ54AHCT08W SNJ54AHCT08W

55 C

125 C

LCCC − FK Tube SNJ54AHCT08FK SNJ54AHCT08FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (26 pages)

PAGE 1
SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) JESD 17 SN54AHCT08 . . . J OR W PACKAGE SN74AHCT08 . . .
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SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L − OCTOBER 1995 − REVISED JULY 2003 FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H H H L X L X L L logic diagram, each gate (positive logic) A Y B absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
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SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L − OCTOBER 1995 − REVISED JULY 2003 recommended operating conditions (see Note 4) SN54AHCT08 SN74AHCT08 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V VI Input voltage 0 5.5 0 5.
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SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L − OCTOBER 1995 − REVISED JULY 2003 noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 5) SN74AHCT08 PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.4 0.8 V VOL(V) Quiet output, minimum dynamic VOL −0.4 −0.8 V VOH(V) Quiet output, minimum dynamic VOH VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage 4.4 V 2 V 0.
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SN54AHCT08, SN74AHCT08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS237L − OCTOBER 1995 − REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test Test Point RL = 1 kΩ From Output Under Test S1 Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.5 V Data Input 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 18-Oct-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) A SNJ54AHCT08J SNJ54AHCT08W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9682101QD A SNJ54AHCT08W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AHCT08DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74AHCT08DGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74AHCT08DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 23-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHCT08DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74AHCT08DGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74AHCT08DR SOIC D 14 2500 333.2 345.9 28.6 SN74AHCT08DR SOIC D 14 2500 367.0 367.0 38.0 SN74AHCT08NSR SO NS 14 2000 367.0 367.0 38.0 SN74AHCT08PWR TSSOP PW 14 2000 367.0 367.0 35.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.