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SN54AHCT16245, SN74AHCT16245

16-BIT BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCLS335J – MARCH 1996 – REVISED OCTOBER 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Members of Texas Instruments’ Widebus

Family

Inputs Are TTL-Voltage Compatible

Distributed V

and GND Pins Minimize

High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

Latch-Up Performance Exceeds 250 mA Per

JESD 17

description

The ’AHCT16245 devices are 16-bit (dual-octal)

noninverting 3-state transceivers designed for

synchronous two-way communication between

data buses. The control-function implementation

minimizes external timing requirements.

These devices can be used as two 8-bit

transceivers or one 16-bit transceiver. They allow

data transmission from the A bus to the B bus or

from the B bus to the A bus, depending on the logic

level at the direction-control (DIR) input. The

output-enable (OE

) input can be used to disable

the device so that the buses are effectively

isolated.

To ensure the high-impedance state during power

up or power down, OE should be tied to V

through a pullup resistor; the minimum value of

the resistor is determined by the current-sinking

capability of the driver.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

SSOP DL

Tube SN74AHCT16245DL

AHCT16245

Cto85

SSOP

–

Tape and reel SN74AHCT16245DLR

AHCT16245

–

40°C

85°C

TSSOP – DGG Tape and reel SN74AHCT16245DGGR AHCT16245

TVSOP – DGV Tape and reel SN74AHCT16245DGVR HF245

–55°C to 125°C CFP – WD Tube SNJ54AHCT16245WD SNJ54AHCT16245WD

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

SN54AHCT16245 . . . WD PACKAGE

SN74AHCT16245 . . . DGG, DGV, OR DL PACKAGE

(TOP VIEW)

1DIR

1B1

1B2

GND

1B3

1B4

1B5

1B6

GND

1B7

1B8

2B1

2B2

GND

2B3

2B4

2B5

2B6

GND

2B7

2B8

2DIR

1OE

1A1

1A2

GND

1A3

1A4

1A5

1A6

GND

1A7

1A8

2A1

2A2

GND

2A3

2A4

2A5

2A6

GND

2A7

2A8

2OE

Summary of content (13 pages)

PAGE 1
SN54AHCT16245, SN74AHCT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS335J – MARCH 1996 – REVISED OCTOBER 2000 D D D D D Members of Texas Instruments’ Widebus Family Inputs Are TTL-Voltage Compatible Distributed VCC and GND Pins Minimize High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHCT16245 . . . WD PACKAGE SN74AHCT16245 . . .
PAGE 2
SN54AHCT16245, SN74AHCT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS335J – MARCH 1996 – REVISED OCTOBER 2000 FUNCTION TABLE (each 8-bit transceiver) INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic symbol† 48 1OE 1DIR 1 G3 3 EN1 [BA] 3 EN2 [AB] 25 2OE 2DIR 24 G6 6 EN4 [BA] 6 EN5 [AB] 1A1 47 2 1 1B1 2 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 46 3 44 5 43 6 41 8 40 9 38 11 37 12 36 13 4 35 5 33 16 32
PAGE 3
SN54AHCT16245, SN74AHCT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS335J – MARCH 1996 – REVISED OCTOBER 2000 logic diagram (positive logic) 1DIR 1 2DIR 48 1A1 25 1OE 47 2A1 2 24 2OE 36 13 1B1 To Seven Other Channels 2B1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.
PAGE 4
SN54AHCT16245, SN74AHCT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS335J – MARCH 1996 – REVISED OCTOBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VOH IOH = –50 mA IOH = –8 mA 45V 4.5 VOL IOL = 50 mA IOL = 8 mA 45V 4.5 II IOZ† OE or DIR A or B inputs VI = VCC or GND VO = VCC or GND Ci OE or DIR VI = VCC or GND, IO = 0 One input at 3.
PAGE 5
SN54AHCT16245, SN74AHCT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS335J – MARCH 1996 – REVISED OCTOBER 2000 noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4) SN74AHCT16245 PARAMETER MIN TYP MAX UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL 0.6 V Quiet output, minimum dynamic VOL –0.6 V VOH(V) VIH(D) Quiet output, minimum dynamic VOH 4.
PAGE 6
SN54AHCT16245, SN74AHCT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS335J – MARCH 1996 – REVISED OCTOBER 2000 PARAMETER MEASUREMENT INFORMATION RL = 1 kΩ From Output Under Test Test Point From Output Under Test S1 VCC Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 11-Aug-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.6 15.8 1.8 12.0 24.0 Q1 SN74AHCT16245DGGR TSSOP DGG 48 2000 330.0 24.4 SN74AHCT16245DGVR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 SN74AHCT16245DLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 11-Aug-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHCT16245DGGR TSSOP DGG 48 2000 346.0 346.0 41.0 SN74AHCT16245DGVR TVSOP DGV 48 2000 346.0 346.0 33.0 SN74AHCT16245DLR SSOP DL 48 1000 346.0 346.0 49.
PAGE 10
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 11
MECHANICAL DATA MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0.025 (0,635) 0.0135 (0,343) 0.008 (0,203) 48 0.005 (0,13) M 25 0.010 (0,25) 0.005 (0,13) 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°–ā8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.004 (0,10) 0.008 (0,20) MIN PINS ** 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.
PAGE 12
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 13
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.