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ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate OR gate 74AHCT SC 70 5
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
   
SCLS320N − MARCH 1996 − REVISED JUNE 2005
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Operating Range of 4.5 V to 5.5 V
D Max t
pd
of 8 ns at 5 V
D Low Power Consumption, 10-µA Max I
CC
D ±8-mA Output Drive at 5 V
D Inputs Are TTL-Voltage Compatible
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
3
2
4
51
AV
CC
Y
B
GND
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
51
AV
CC
Y
B
GND
3
2
4
51
AV
CC
Y
B
GND
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
description/ordering information
The SN74AHCT1G32 is a single 2-input positive-OR gate. The device performs the Boolean function
Y + A ) BorY+ A
• B in positive logic.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
SOT (SOT-23) − DBV
Reel of 3000 SN74AHCT1G32DBVR
B32_
SOT (SOT-23) − DBV
Reel of 250 SN74AHCT1G32DBVT
B32_
−40°C to 85°C
SOT (SC-70) − DCK
Reel of 3000 SN74AHCT1G32DCKR
BG_
−40 C to 85 C
SOT (SC-70) − DCK
Reel of 250 SN74AHCT1G32DCKT
BG_
SOT (SOT-553) − DRL Reel of 4000 SN74AHCT1G32DRLR BG_
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
‡
The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OUTPUT
A B
OUTPUT
Y
H X H
X HH
L L L
logic diagram (positive logic)
1
2
4
A
B
Y
Copyright 2005, Texas Instruments Incorporated
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