Datasheet

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OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
SN74AHCT541 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
Y1
Y2
Y3
Y4
Y5
A3
A4
A5
A6
A7
SN54AHCT541 . . . FK PACKAGE
(TOP VIEW)
A2
A1
OE1
Y7
Y6 OE2
A8
GND
Y8
V
CC
SN54AHCT541 . . . J or W PACKAGE
SN54AHCT541
SN74AHCT541
www.ti.com
SCLS269P OCTOBER 1995REVISED JUNE 2013
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
Check for Samples: SN54AHCT541, SN74AHCT541
1
FEATURES
Inputs Are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
DESCRIPTION
The ’AHCT541 octal buffers/drivers are ideal for
driving bus lines or buffer memory address registers.
These devices feature inputs and outputs on opposite
sides of the package to facilitate printed circuit board
layout.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable (OE1
or OE2) input is high, all corresponding outputs are in
the high-impedance state. The outputs provide non-
inverted data when they are not in the high-
impedance state.
To ensure the high-impedance state during power up
or power down, OE should be tied to V
CC
through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
FUNCTION TABLE
(EACH FLIP-FLOP)
INPUTS OUTP
UT
OE1 OE2 A
Y
L L L L
L L H H
H X X Z
X H X Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1995–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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