Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Standard Three-state, Non-inverting DIP 20

SN54AHCT574, SN74AHCT574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS245L – OCTOBER 1995 – REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Inputs Are TTL-Voltage Compatible

Latch-Up Performance Exceeds 250 mA Per

JESD 17

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

SN54AHCT574 ...J OR W PACKAGE

SN74AHCT574 . . . DB, DGV, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

SN54AHCT574 . . . FK PACKAGE

(TOP VIEW)

GND

CLK

3212019

910111213

7Q 1Q

GND

CLK

description/ordering information

The ’AHCT574 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed

specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly

suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs.

A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low) or the

high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

The high-impedance state and the increased drive provide the capability to drive bus lines without interface or

pullup components.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74AHCT574N SN74AHCT574N

SOIC DW

Tube SN74AHCT574DW

AHCT574

SOIC

–

Tape and reel SN74AHCT574DWR

AHCT574

Cto85

SOP – NS Tape and reel SN74AHCT574NSR AHCT574

–

40°C

85°C

SSOP – DB Tape and reel SN74AHCT574DBR HB574

TSSOP PW

Tube SN74AHCT574PW

HB574

TSSOP

–

Tape and reel SN74AHCT574PWR

HB574

TVSOP – DGV Tape and reel SN74AHCT574DGVR HB574

CDIP – J Tube SNJ54AHCT574J SNJ54AHCT574J

–55°C to 125°C

CFP – W Tube SNJ54AHCT574W SNJ54AHCT574W

LCCC – FK Tube SNJ54AHCT574FK SNJ54AHCT574FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (23 pages)

PAGE 1
SN54AHCT574, SN74AHCT574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS245L – OCTOBER 1995 – REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHCT574 . . . J OR W PACKAGE SN74AHCT574 . . .
PAGE 2
SN54AHCT574, SN74AHCT574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS245L – OCTOBER 1995 – REVISED JULY 2003 description/ordering information (continued) OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
PAGE 3
SN54AHCT574, SN74AHCT574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS245L – OCTOBER 1995 – REVISED JULY 2003 recommended operating conditions (see Note 3) SN54AHCT574 SN74AHCT574 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage 0.8 V Input voltage 0 5.5 0 5.
PAGE 4
SN54AHCT574, SN74AHCT574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS245L – OCTOBER 1995 – REVISED JULY 2003 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.
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SN54AHCT574, SN74AHCT574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS245L – OCTOBER 1995 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point S1 VCC Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.0 Q1 SN74AHCT574DBR SSOP DB 20 2000 330.0 16.4 SN74AHCT574DGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74AHCT574DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AHCT574DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74AHCT574DGVR TVSOP DGV 20 2000 367.0 367.0 35.0 SN74AHCT574DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74AHCT574NSR SO NS 20 2000 367.0 367.0 45.0 SN74AHCT574PWR TSSOP PW 20 2000 364.0 364.0 27.0 SN74AHCT574PWR TSSOP PW 20 2000 367.0 367.0 38.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.