Datasheet

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SN54ALS299, SN74ALS299

8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS

WITH 3-STATE OUTPUTS

SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

• Multiplexed I/O Ports Provide Improved Bit

Density

• Four Modes of Operation:

– Hold (Store)

– Shift Right

– Shift Left

– Load Data

• Operate With Outputs Enabled or at High

Impedance

• 3-State Outputs Drive Bus Lines Directly

• Can Be Cascaded for n-Bit Word Lengths

• Direct Overriding Clear

• Applications:

– Stacked or Push-Down Registers

– Buffer Storage

– Accumulator Registers

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic (N)

and Ceramic (J) 300-mil DIPs

description

These 8-bit universal shift/storage registers

feature multiplexed I/O ports to achieve full 8-bit

data handling in a single 20-pin package. Two

function-select (S0, S1) inputs and two output-

enable (OE1

, OE2) inputs can be used to choose

the modes of operation listed in the function table.

Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs

in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading

out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs

asynchronously when the clear (CLR

) input is low. Taking either OE1 or OE2 high disables the outputs, but has

no effect on clearing, shifting, or storing data.

The SN54ALS299 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ALS299 is characterized for operation from 0°C to 70°C.

OE1

OE2

G/Q

E/Q

C/Q

A/Q

A′

CLR

GND

H′

H/Q

F/Q

D/Q

B/Q

CLK

SN54ALS299 ...J PACKAGE

SN74ALS299 . . . DW OR N PACKAGE

(TOP VIEW)

3212019

910111213

H′

H/Q

F/Q

D/Q

G/Q

E/Q

C/Q

A/Q

A′

OE2

OE1

CLK

B/Q

CLR

GND

SN54ALS299 . . . FK PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Summary of content (17 pages)

PAGE 1
SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 • • • • • description These 8-bit universal shift /storage registers feature multiplexed I/O ports to achieve full 8-bit data handling in a single 20-pin package. Two function-select (S0, S1) inputs and two outputenable (OE1, OE2) inputs can be used to choose the modes of operation listed in the function table.
PAGE 2
SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 FUNCTION TABLE INPUTS MODE I/O PORTS CLR S1 S0 OE1† OE2† CLK SL SR A/QA B/QB C/QC D/QD Clear L L L X L H L X H L L X L L X X X X X X X X X X L L X L L X L L X Hold H H L X L X L L L L X L X X X X QA0 QA0 QB0 QB0 Shift Right H H L L H H L L L L ↑ ↑ X X H L H L Shift Left H H H H L L L L L L ↑ ↑ H L X X Load H H H X X
PAGE 3
SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 logic diagram (positive logic) S0 S1 SR (shift right serial input) CLK 1 19 18 11 Six Identical Channels Not Shown† 12 1D 1D C1 C1 R QA′ CLR OE1 OE2 SL (shift left serial input) R 17 8 9 QH′ 2 3 7 16 A /QA H /QH † I/O ports not shown: B/QB (13), C/QC (6), D/QD (14), E/QE (5), F/QF (15), and G/QG (4).
PAGE 4
SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 recommended operating conditions SN54ALS299 VCC VIH Supply voltage VIL Low-level input voltage High-level input voltage IOH High level output current High-level IOL Low level output current Low-level TA Operating free-air temperature SN74ALS299 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 QA′ or QH′ QA – QH QA′ or QH′ QA – QH – 55 V V 0.7 0.
PAGE 5
SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) SN54ALS299 fclock tw Clock frequency (at 50% duty cycle) Pulse duration tsu th Hold time after CLK↑ 0 17 SN74ALS299 MIN MAX 0 30 22 16.
PAGE 6
SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
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PACKAGE OPTION ADDENDUM www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.