Datasheet

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   
  
SDAS163B − DECEMBER 1982 − REVISED NOVEMBER 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D 3-State Buffer-Type Outputs Drive Bus
Lines Directly
D Bus-Structured Pinout
description/ordering information
These 8-bit D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q
outputs follow the complements of data (D) inputs.
When LE is taken low, the outputs are latched at
the inverse of the levels set up at the D inputs.
A buffered output-enable (OE
) input places the
eight outputs in either a normal logic state (high or
low logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and increased high logic
level provide the capability to drive bus lines
without interface or pullup components.
OE
does not affect internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE MARKING
PDIP − N Tube of 20 SN74ALS563BN SN74ALS563BN
0°C to 70°C
SOIC − DW
Tube of 25 SN74ALS563BDW
ALS563B
0°C to 70°C SOIC − DW
Reel of 2000 SN74ALS563BDWR
ALS563B
SOP − NS Reel of 2000 SN74ALS563BNSR ALS563B
CDIP − J Tube of 20 SNJ54ALS563BJ SNJ54ALS563BJ
−55°C to 125°C
CFP − W Tube of 85 SNJ54ALS563BW SNJ54ALS563BW
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54ALS563BFK SNJ54ALS563BFK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
Copyright  2004, Texas Instruments Incorporated
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1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
SN54ALS563B ...J OR W PACKAGE
SN74ALS563B ...DW, N, OR NS PACKAGE
(TOP VIEW)
3 212019
910111213
4
5
6
7
8
18
17
16
15
14
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
SN54ALS563B...FK PACKAGE
(TOP VIEW)
2D 1D OE
8Q 7Q 1Q
8D
G
ND
LE
V
CC
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f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.