Datasheet

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

SDAS300 − MARCH 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
Bidirectional Bus Transceivers in
High-Density 20-Pin Packages
Choice of True or Inverting Logic
Package Options Include Plastic
Small-Outline (DW) Packages and
Standard Plastic (N) 300-mil DIPs
DEVICE
LOGIC
SN74ALS641A, SN74AS641 True
SN74ALS642A Inverting
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending
upon the level at the direction-control (DIR) input. The output-enable (OE
) input disables the device so that the
buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that
the recommended maximum I
OL
is increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OPERATION
OE DIR
SN74ALS641A
SN74AS641
SN74ALS642A
L L B data to A bus B data to A bus
L H A data to B bus A data to B bus
H X Isolation Isolation
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
DW OR N PACKAGE
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