Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Latch Transparent D latch Three-state SOIC 24

SN54ALS873B, SN54AS873A...JT PACKAGE

SN74ALS873B, SN74AS873A...DW OR NT PACKAGE

(TOP VIEW)

SN54ALS873B, SN54AS873A...FK PACKAGE

(TOP VIEW)

1CLR

1OE

1D1

1D2

1D3

1D4

2D1

2D2

2D3

2D4

2OE

GND

1LE

1Q1

1Q2

1Q3

1Q4

2Q1

2Q2

2Q3

2Q4

2LE

2CLR

NC − No internal connection

3212827

12 13

1Q2

1Q3

1Q4

2Q1

2Q2

2Q3

1D2

1D3

1D4

2D1

2D2

2D3

426

14 15 16 17 18

2D4

2OE

GND

2CLR

2LE

2Q4

1D1

1OE

1CLR

1LE

1Q1

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



SDAS036D − APRIL 1982 − REVISED AUGUST 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

• 3-State Buffer-Type Outputs Drive Bus

Lines Directly

• Bus-Structured Pinout

• Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Plastic (NT) and

Ceramic (JT) DIPs

description

These dual 4-bit D-type latches feature 3-state

outputs designed specifically for bus driving.

These devices are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

The dual 4-bit latches are transparent D-type

latches. While the latch-enable (LE) input is high,

the Q outputs follow the data (D) inputs in true

form, according to the function table. When LE is

low, the outputs are latched. When the clear (CLR

)

input goes low, the Q outputs go low

independently of LE. The outputs are in the

high-impedance state when the output-enable

(OE

) input is at a high logic level.

The SN54ALS873B and SN54AS873A are

characterized for operation over the full military

temperature range of −55°C to 125°C. The

SN74ALS873B and SN74AS873A are

characterized for operation from 0°C to 70°C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

CLR

LE D

OUTPUT

L L X X L

L HHH H

L HHL L

L HLX Q

H X X X Z

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Summary of content (18 pages)

PAGE 1
SDAS036D − APRIL 1982 − REVISED AUGUST 1995 • • • SN54ALS873B, SN54AS873A . . . JT PACKAGE SN74ALS873B, SN74AS873A . . .
PAGE 2
logic symbol† logic diagram (each quad latch, positive logic) SDAS036D − APRIL 1982 − REVISED AUGUST 1995 2 1OE 1LE 23 1 1CLR 1D1 1D2 1D3 1D4 3 2LE 2CLR 2D1 2D2 2D3 2D4 C1 C LE 22 1D 4 21 5 20 6 19 11 2OE OE EN 14 13 7 1Q1 CLR 1Q2 R C1 1Q3 D1 1Q4 Q1 1D R C1 EN D2 C1 Q2 1D C 18 1D 8 17 9 16 10 15 R C1 2Q1 D3 2Q2 Q3 1D 2Q3 R C1 2Q4 D4 Q4 1D † This symbol is in accordance wi
PAGE 3
SDAS036D − APRIL 1982 − REVISED AUGUST 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK SN54ALS873B TYP† MAX TEST CONDITIONS MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = − 18 mA IOH = − 0.4 mA VCC = 4.5 V IOH = − 1 mA IOH = − 2.6 mA VOL VCC = 4.5 V IOL = 12 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.
PAGE 4
SDAS036D − APRIL 1982 − REVISED AUGUST 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL D Q tPLH tPHL LE Q CLR Q tPHL tPZH tPZL tPHZ VCC = 4.5 V to 5.
PAGE 5
SDAS036D − APRIL 1982 − REVISED AUGUST 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK SN54AS873A TYP† MAX TEST CONDITIONS MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = − 18 mA IOH = − 2 mA VCC = 4.5 V IOH = − 12 mA IOH = − 15 mA VOL VCC = 4.5 V IOL = 32 mA IOL = 48 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.
PAGE 6
SDAS036D − APRIL 1982 − REVISED AUGUST 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL D Q tPLH tPHL LE Q CLR Q tPHL tPZH tPZL tPHZ OE Q VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† SN54AS873A SN74AS873A MIN MAX MIN MAX 3 12.5 3 9.5 3 8.5 3 7.5 6 15.5 6 13 4 9 4 7.5 3 10.5 3 9 2 8 2 6.5 4 11 4 10.
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SDAS036D − APRIL 1982 − REVISED AUGUST 1995 PARAMETER MEASUREMENT INFORMATION 7V SWITCH POSITION TABLE Open S1 R1 = 500 Ω From Output Under Test CL = 50 pF (see Note A) Test Point R2 = 500 Ω TEST S1 tPLH tPHL Open Open tPZH tPZL Open Closed tPHZ tPLZ Closed Open LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V 1.3 V 0.3 V tw 3.5 V Timing Input 1.3 V 0.3 V th tsu 3.5 V Data Input 1.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) SNJ54AS873AW OBSOLETE Package Type Package Pins Package Drawing Qty CFP W 24 Eco Plan Lead/Ball Finish (2) TBD MSL Peak Temp Op Temp (°C) Device Marking (3) Call TI Call TI (4/5) -55 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74ALS873BDWR Package Package Pins Type Drawing SOIC DW 24 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.75 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 15.7 2.7 12.0 24.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS873BDWR SOIC DW 24 2000 367.0 367.0 45.
PAGE 13
MECHANICAL DATA MCER004A – JANUARY 1995 – REVISED JANUARY 1997 JT (R-GDIP-T**) CERAMIC DUAL-IN-LINE 24 LEADS SHOWN PINS ** A 13 24 B 1 24 28 A MAX 1.280 (32,51) 1.460 (37,08) A MIN 1.240 (31,50) 1.440 (36,58) B MAX 0.300 (7,62) 0.291 (7,39) B MIN 0.245 (6,22) 0.285 (7,24) DIM 12 0.070 (1,78) 0.030 (0,76) 0.100 (2,54) MAX 0.320 (8,13) 0.290 (7,37) 0.015 (0,38) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.014 (0,36) 0.008 (0,20) 0.
PAGE 14
MECHANICAL DATA MCFP007 – OCTOBER 1994 W (R-GDFP-F24) CERAMIC DUAL FLATPACK 0.375 (9,53) 0.340 (8,64) Base and Seating Plane 0.006 (0,15) 0.004 (0,10) 0.090 (2,29) 0.045 (1,14) 0.045 (1,14) 0.026 (0,66) 0.395 (10,03) 0.360 (9,14) 0.360 (9,14) 0.240 (6,10) 1 0.360 (9,14) 0.240 (6,10) 24 0.019 (0,48) 0.015 (0,38) 0.050 (1,27) 0.640 (16,26) 0.490 (12,45) 0.030 (0,76) 0.015 (0,38) 12 13 30° TYP 1.115 (28,32) 0.840 (21,34) 4040180-5 / B 03/95 NOTES: A. B. C. D. E.
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