Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICs74ALVC SSOP 56

www.ti.com

FEATURES

DESCRIPTION/ORDERING INFORMATION

GND

Y10

Y11

Y12

GND

Y13

Y14

Y15

Y16

Y17

GND

Y18

GND

A10

A11

A12

GND

A13

A14

A15

A16

A17

GND

A18

CLK

GND

DGG, DGV, OR DL PACKAGE

(TOP VIEW)

NC − No internal connection

SN74ALVC16835

18-BIT UNIVERSAL BUS DRIVER

WITH 3-STATE OUTPUTS

SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004

• Member of the Texas Instruments Widebus™

Family

• Operates From 1.65 V to 3.6 V

• Max t

of 2 ns at 3.3 V

• ± 24-mA Output Drive at 3.3 V

• Ideal for Use in PC100 Register DIMM,

Revision 1.1

• Latch-Up Performance Exceeds 250 mA Per

JESD 17

• ESD Protection Exceeds JESD 22

- 2000-V Human-Body Model (A114-A)

- 200-V Machine Model (A115-A)

- 1000-V Charged-Device Model (C101)

This 18-bit universal bus driver is designed for 1.65-V

to 3.6-V V

operation.

Data flow from A to Y is controlled by the

output-enable ( OE) input. The device operates in the

transparent mode when the latch-enable (LE) input is

high. The A data is latched if the clock (CLK) input is

held at a high or low logic level. If LE is low, the A

data is stored in the latch/flip-flop on the low-to-high

transition of CLK. When OE is high, the outputs are in

the high-impedance state.

To ensure the high-impedance state during power up

or power down, OE should be tied to V

through a

pullup resistor; the minimum value of the resistor is

determined by the current-sinking capability of the

driver.

ORDERING INFORMATION

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

Tube SN74ALVC16835DL

SSOP - DL ALVC16835

Tape and reel SN74ALVC16835DLR

TSSOP - DGG Tape and reel SN74ALVC16835DGGR ALVC16835

-40 ° C to 85 ° C

TVSOP - DGV Tape and reel SN74ALVC16835DGVR VC835

VFBGA - GQL SN74ALVC16835GQLR

Tape and reel VC835

VFBGA - ZQL (Pb-free) SN74ALVC16835ZQLR

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (16 pages)

PAGE 1
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 FEATURES • • • • • • • DGG, DGV, OR DL PACKAGE (TOP VIEW) Member of the Texas Instruments Widebus™ Family Operates From 1.65 V to 3.6 V Max tpd of 2 ns at 3.3 V ±24-mA Output Drive at 3.3 V Ideal for Use in PC100 Register DIMM, Revision 1.
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SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.
PAGE 3
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 LOGIC DIAGRAM (POSITIVE LOGIC) OE CLK LE A1 27 30 28 54 1D C1 3 Y1 CLK To 17 Other Channels Pin numbers shown are for the DGG, DGV, and DL packages. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range -0.5 4.6 V VI Input voltage range (2) -0.5 4.
PAGE 4
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage VCC = 1.65 V to 1.95 V VIH High-level input voltage MIN MAX 1.65 3.6 UNIT V 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 V 0.35 × VCC VCC = 1.65 V to 1.95 V VIL Low-level input voltage VCC = 2.3 V to 2.7 V 0.7 VI Input voltage 0 3.6 V VO Output voltage 0 VCC V VCC = 2.7 V to 3.
PAGE 5
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = -100 µA 1.65 V to 3.6 V 1.65 V IOH = -6 mA 2.3 V 2 2.3 V 1.7 2.7 V 2.2 3V 2.4 IOH = -24 mA 3V 2 IOL = 100 µA IOH = -12 mA 0.2 1.65 V 0.45 IOL = 6 mA 2.3 V 0.4 2.3 V 0.
PAGE 6
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 SWITCHING CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) FROM (INPUT) PARAMETER TO (OUTPUT) VCC = 1.8 V MIN TYP (1) fmax tpd LE (1) (1) Y Y Y OE tdis OE VCC = 2.7 V MAX 150 1 CLK ten MIN (1) A (1) VCC = 2.5 V ± 0.2 V MIN MAX 150 VCC = 3.3 V ± 0.3 V MIN UNIT MAX 150 MHz 4.2 4.2 1 3.6 1.
PAGE 7
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test Open GND CL (see Note A) RL TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUT VCC 1.8 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.
PAGE 8
SN74ALVC16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES125J – FEBRUARY 1998 – REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS 0 ALVC16835 Pullup x PC100 Requirements + I OH − Output Current − mA −0.05 −0.1 −0.15 −0.2 −0.25 0 0.5 1 1.5 2 2.5 3 VOH − Output Voltage − V Figure 2. IV Characteristics – Pullup 0.25 ALVC16835 Pulldown x + PC100 Requirements IOL − Output Current − mA 0.2 0.15 0.1 0.05 0 0 0.5 1 1.5 2 2.5 VOL − Output Voltage − V Figure 3.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ALVC16835DGGR TSSOP DGG 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 Q1 SN74ALVC16835DGVR TVSOP DGV 56 2000 330.0 24.4 6.8 11.7 1.6 12.0 24.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALVC16835DGGR TSSOP DGG 56 2000 367.0 367.0 45.0 SN74ALVC16835DGVR TVSOP DGV 56 2000 367.0 367.0 45.
PAGE 13
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 14
PAGE 15
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.