Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Standard Three-state, Non-inverting DIP 20

SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS

WITH 3-STATE OUTPUTS

SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D-Type Flip-Flops in a Single Package With

3-State Bus Driving True Outputs

Full Parallel Access for Loading

Buffered Control Inputs

Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic (N)

and Ceramic (J) DIPs

description

These octal D-type edge-triggered flip-flops

feature 3-state outputs designed specifically for

driving highly capacitive or relatively

low-impedance loads. They are particularly

suitable for implementing buffer registers, I/O

ports, bidirectional bus drivers, and working

registers.

On the positive transition of the clock (CLK) input,

the Q outputs are set to the logic levels set up at

the data (D) inputs.

A buffered output-enable (OE

) input places the

eight outputs in either a normal logic state (high or

low logic levels) or the high-impedance state. In

the high-impedance state, the outputs neither

load nor drive the bus lines significantly. The

high-impedance state and the increased drive

provide the capability to drive bus lines without

interface or pullup components.

does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range

of –55°C to 125°C. The SN74ALS374A and SN74AS374 are characterized for operation from 0°C to 70°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE CLK D

L ↑ H H

L ↑ LL

L H or L X Q

H X X Z

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

CLK

SN54ALS374A, SN54AS374 . . . J PACKAGE

SN74ALS374A, SN74AS374 . . . DW OR N PACKAGE

(TOP VIEW)

3212019

910111213

SN54ALS374A, SN54AS374 . . . FK PACKAGE

(TOP VIEW)

5D 8Q

GND

CLK

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (23 pages)

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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 D D D SN54ALS374A, SN54AS374 . . . J PACKAGE SN74ALS374A, SN74AS374 . . .
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 logic symbol† OE CLK 1 logic diagram (positive logic) OE EN 11 CLK C1 1 11 C1 1D 2D 3D 4D 5D 6D 7D 8D 3 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 1Q 1D 3 2 1Q 1D 2Q 3Q 4Q To Seven Other Channels 5Q 6Q 7Q 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = –0.4 mA 5V VCC = 4 4.5 IOH = –1 mA IOH = –2.6 mA VOL VCC = 4 4.5 5V IOL = 12 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.4 V II IIH VCC = 5.
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 recommended operating conditions SN54AS374 SN74AS374 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.7 0.
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 switching characteristics over recommended operating conditions (unless otherwise noted) (see Figure 3) PARAMETER fmax tPLH tPHL tPZH tPZL tPHZ FROM (INPUT) TO (OUTPUT) SN54AS374 MIN MAX 100* CLK Q OE Q OE Q tPLZ * On products compliant to MIL-PRF-38535, this parameter is not production tested.
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 APPLICATION INFORMATION Four SN54ALS374A, SN74ALS374A, or ’AS374 EN C 8 8 ’ALS139 A Output-Enable Select B G X/Y 1 2 0 EN 1 C 2 EN 8 8 3 A Input Clock Select B EN G C 8 Clock 8 EN C 8 8 Input Figure 1.
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 APPLICATION INFORMATION SN54ALS374A, SN74ALS374A, or ’AS374 Output Enable 1 EN Clock 1 C1 1D Bidirectional Data Bus 1 Bidirectional Data Bus 2 SN54ALS374A, SN74ALS374A, or ’AS374 EN Output Enable 2 Clock 2 C1 1D Clock 1 H Bus-Exchange Clock Clock 2 H Clock Circuit for Bus Exchange Figure 2.
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SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V VCC S1 500 Ω From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) CL = 50 pF (see Note A) 500 Ω 3.5 V Timing Input 500 Ω 3.5 V High-Level Pulse 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ALS374ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ALS374ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74AS374NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ALS374ADWR SOIC DW 20 2000 367.0 367.0 45.0 SN74ALS374ANSR SO NS 20 2000 367.0 367.0 45.0 SN74AS374NSR SO NS 20 2000 367.0 367.0 45.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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