Datasheet

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3
2
4
51
NC V
CC
Y
A
GND
DBVPACKAGE
(TOPVIEW)
YZPPACKAGE
(BOTTOMVIEW)
DCKPACKAGE
(TOPVIEW)
3
2
4
51
NC V
CC
Y
A
GND
DNU
GND
V
CC
Y
A
NC – Nointernalconnection
1
4
2
3
5
Seemechanicaldrawingsfordimensions.
DNU Donotuse-
DRY PACKAGE
(TOP VIEW)
A NC
NC
6
5
4
2
3
GND
Y
V
CC
1
PREVIE
W
DESCRIPTION/ORDERING INFORMATION
SN74AUC1GU04
SINGLE INVERTER GATE
SCES371L – SEPTEMBER 2001 – REVISED APRIL 2007
• Available in the Texas Instruments • ± 8-mA Output Drive at 1.8 V
NanoFree™ Package
• Unbuffered Output
• Optimized for 1.8-V Operation and Is 3.6-V I/O
• Latch-Up Performance Exceeds 100 mA Per
Tolerant to Support Mixed-Mode Signal
JESD 78, Class II
Operation
• ESD Protection Exceeds JESD 22
• Sub-1-V Operable
– 2000-V Human-Body Model (A114-A)
• Max t
pd
of 2.4 ns at 1.8 V
– 200-V Machine Model (A115-A)
• Low Power Consumption, 10- µ A Max I
CC
– 1000-V Charged-Device Model (C101)
This single inverter gate is operational at 0.8-V to 2.7-V V
CC
, but is designed specifically for 1.65-V to 1.95-V V
CC
operation.
The SN74AUC1GU04 contains one inverter with an unbuffered output and performs the Boolean function Y = A.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
ORDERING INFORMATION
ORDERABLE PART
T
A
PACKAGE
(1) (2)
TOP-SIDE MARKING
(3)
NUMBER
NanoFree™ – WCSP
(DSBGA)
Reel of 3000 SN74AUC1GU04YZPR _ _ _UD_
0.23-mm Large Bump – YZP
(Pb-free)
–40 ° C to 85 ° C
SON – DRY Reel of 5000 SN74AUC1GU04DRYR PREVIEW
SOT (SOT-23) – DBV Reel of 300 SN74AUC1GU04DBVR UU4_
SOT (SC-70) – DCK Reel of 300 SN74AUC1GU04DCKR UD_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(3) DBV/DCK/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2001–2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.