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136
-128-144-160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
17015311910285685134170
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
T
A
= 25°C
Process = Nominal
I
OL
- Output Current - mA
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
= 1.8 V
- Output Voltage - V
OL
V
T
A
= 25°C
Process = Nominal
I
OH
- Output Current - mA
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
= 1.8 V
- Output Voltage - V
OH
V
-80-96-112 -32-48-64 0-16
SN74AVC16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES142L JULY 1998 REVISED MAY 2005
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
Member of the Texas Instruments Widebus™
Family I
off
Supports Partial-Power-Down Mode
Operation
EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process ESD Protection Exceeds JESD 22
DOC™ (Dynamic Output Control) Circuit 2000-V Human-Body Model (A114-A)
Dynamically Changes Output Impedance,
200-V Machine Model (A115-A)
Resulting in Noise Reduction Without Speed
Latch-Up Performance Exceeds 250 mA Per
Degradation
JESD 78
Less Than 2-ns Maximum Propagation Delay
Package Options Include Plastic Thin Shrink
at 2.5-V and 3.3-V V
CC
Small-Outline (DGG) and Thin Very
Dynamic Drive Capability Is Equivalent to
Small-Outline (DGV) Packages
Standard Outputs With I
OH
and I
OL
of ± 24 mA
at 2.5-V V
CC
A Dynamic Output Control (DOC™) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows
typical V
OL
vs I
OL
and V
OH
vs I
OH
curves to illustrate the output impedance and drive capability of the circuit. At
the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry
Technology and Applications, literature number SCEA009.
Figure 1. Output Voltage vs Output Current
This 16-bit (dual octal) noninverting bus transceiver is operational at 1.2-V to 3.6-V V
CC
, but is designed
specifically for 1.65-V to 3.6-V V
CC
operation.
The SN74AVC16245 is designed for asynchronous communication between data buses. The control-function
implementation minimizes external timing requirements.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable ( OE) input can be used to disable the device so that the buses are effectively isolated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC, DOC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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