Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Transducer Converter, Bidirectional, Three-state SC 70 6

FEATURES

CCA

CCB

GND

DBV PACKAGE

(TOP VIEW)

DCK PACKAGE

(TOP VIEW)

CCA

CCB

GND

CCA

CCB

GND

DRL PACKAGE

(TOP VIEW)

See mechanical drawings for dimensions.

DIR

YZP PACKAGE

(BOTTOM VIEW)

DIR

CCB

GND

CCA

DESCRIPTION/ORDERING INFORMATION

SN74AVC1T45

SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES530G – DECEMBER 2003 – REVISED JANUARY 2008

www.ti.com

• Available in the Texas Instruments NanoFree™ • Typical Max Data Rates

Package

– 500 Mbps (1.8-V to 3.3-V Translation)

• Fully Configurable Dual-Rail Design Allows

– 320 Mbps (<1.8-V to 3.3-V Translation)

Each Port to Operate Over the Full 1.2-V to

– 320 Mbps (Translate to 2.5 V or 1.8 V)

3.6-V Power-Supply Range

– 280 Mbps (Translate to 1.5 V)

• V

Isolation Feature - If Either V

Input Is at

– 240 Mbps (Translate to 1.2 V)

GND, Both Ports Are in the High-Impedance

• Latch-Up Performance Exceeds 100 mA Per

State

JESD 78, Class II

• DIR Input Circuit Referenced to V

CCA

• ESD Protection Exceeds JESD 22

• ± 12-mA Output Drive at 3.3 V

– 2000-V Human-Body Model (A114-A)

• I/Os Are 4.6-V Tolerant

– 200-V Machine Model (A115-A)

• I

off

Supports Partial-Power-Down Mode

– 1000-V Charged-Device Model (C101)

Operation

This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The

SN74AVC1T45 is optimized to operate with V

CCA

CCB

set at 1.4 V to 3.6 V. It is operational with V

CCA

CCB

low as 1.2 V. The A port is designed to track V

CCA

. V

CCA

accepts any supply voltage from 1.2 V to 3.6 V. The

B port is designed to track V

CCB

. V

CCB

accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal

low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

(3)

NanoFree™ – WCSP (DSBGA)

Reel of 3000 SN74AVC1T45YZPR _ _ _TC_

0.23-mm Large Bump – YZP (Pb-free)

SOT (SOT-23) – DBV Reel of 3000 SN74AVC1T45DBVR DT1_

– 40 ° C to 85 ° C

SOT (SC-70) – DCK Reel of 3000 SN74AVC1T45DCKR TC_

SOT (SOT-553) – DRL Reel of 4000 SN74AVC1T45DRLR TC_

(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com .

(3) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (27 pages)

PAGE 1
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 FEATURES 1 • Available in the Texas Instruments NanoFree™ Package • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.
PAGE 2
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 DESCRIPTION/ORDERING INFORMATION (CONTINUED) The SN74AVC1T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs.
PAGE 3
www.ti.com SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.
PAGE 4
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Recommended Operating Conditions (1) (2) (3) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.2 3.6 V VCCB Supply voltage 1.2 3.
PAGE 5
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VOL II 1.2 V to 3.6 V 1.2 V to 3.6 V IOH = –3 mA 1.2 V 1.2 V IOH = –6 mA 1.4 V 1.4 V 1.05 IOH = –8 mA 1.65 V 1.65 V 1.2 IOH = –9 mA 2.3 V 2.3 V 1.75 IOH = –12 mA 3V 3V 2.
PAGE 6
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.
PAGE 7
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.
PAGE 8
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.
PAGE 9
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 Power-Up Considerations A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies. To guard against such power-up problems, take the following precautions: 1. Connect ground before any supply voltage is applied. 2. Power up VCCA. 3.
PAGE 10
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 TYPICAL CHARACTERISTICS 6 6 5 5 4 4 tPHL - ns tPLH - ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE, TA = 25°C, VCCA = 1.2 V 3 2 3 2 VCCB = 1.2 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 3.
PAGE 11
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 TYPICAL CHARACTERISTICS 6 6 5 5 4 4 tPHL - ns tPLH - ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE, TA = 25°C, VCCA = 1.8 V 3 2 3 2 VCCB = 1.2 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 3.
PAGE 12
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 TYPICAL CHARACTERISTICS TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE, TA = 25°C, VCCA = 3.3 V 6 6 VCCB = 1.2 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.5 V VCCB = 1.8 V 5 VCCB = 1.8 V 5 VCCB = 2.5 V VCCB = 2.5 V VCCB = 3.3 V VCCB = 3.
PAGE 13
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ 0.
PAGE 14
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 APPLICATION INFORMATION Figure 2 shows an example of the SN74AVC1T45 being used in a unidirectional logic level-shifting application. VCC1 VCC1 VCC2 1 6 2 5 3 4 SYSTEM-1 VCC2 SYSTEM-2 PIN NAME FUNCTION DESCRIPTION 1 VCCA VCC1 SYSTEM-1 supply voltage (1.2 V to 3.
PAGE 15
SN74AVC1T45 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES530G – DECEMBER 2003 – REVISED JANUARY 2008 APPLICATION INFORMATION Figure 3 shows the SN74AVC1T45 being used in a bidirectional logic level-shifting application. Since the SN74AVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jun-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SN74AVC1T45DBVR SOT-23 3000 180.0 8.4 DBV 6 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 SN74AVC1T45DBVT SOT-23 DBV 6 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AVC1T45DCKR SC70 DCK 6 3000 180.0 8.4 2.25 2.4 1.22 4.0 8.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jun-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AVC1T45DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0 SN74AVC1T45DBVT SOT-23 DBV 6 250 202.0 201.0 28.0 SN74AVC1T45DCKR SC70 DCK 6 3000 202.0 201.0 28.0 SN74AVC1T45DCKR SC70 DCK 6 3000 214.0 199.0 55.0 SN74AVC1T45DCKT SC70 DCK 6 250 202.0 201.0 28.0 SN74AVC1T45DRLR SOT DRL 6 4000 202.0 201.0 28.
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D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.
PAGE 27
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.