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SCES566F − MAY 2004 − REVISED APRIL 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Control Inputs V

Levels are

Referenced to V

CCA

Voltage

D V

Isolation Feature − If Either V

Input

Is at GND, Both Ports Are in the

High-Impedance State

D Overvoltage-Tolerant Inputs/Outputs Allow

Mixed-Voltage-Mode Data Communications

D Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.2-V to

3.6-V Power-Supply Range

D I

off

Supports Partial-Power-Down Mode

Operation

D I/Os Are 4.6-V Tolerant

D Max Data Rates

− 380 Mbps (1.8-V to 3.3-V Translation)

− 260 Mbps (< 1.8-V to 3.3-V Translation)

− 260 Mbps (Translate to 2.5 V)

− 210 Mbps (Translate to 1.8 V)

− 120 Mbps (Translate to 1.5 V)

− 100 Mbps (Translate to 1.2 V)

D Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

D ESD Protection Exceeds JESD 22

− 8000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

description/ordering information

This 20-bit noninverting bus transceiver uses two

separate configurable power-supply rails.

The SN74AVC20T245 is optimized to operate with V

CCA

CCB

set at 1.4 V to 3.6 V. It is operational with

CCA

CCB

as low as 1.2 V. The A port is designed to track V

CCA

. V

CCA

accepts any supply voltage from

1.2 V to 3.6 V. The B port is designed to track V

CCB

. V

CCB

accepts any supply voltage from 1.2 V to 3.6 V. This

allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V

voltage nodes.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

TSSOP − DGG Tape and reel SN74AVC20T245DGGR AVC20T245

−40°C to 85°C

TVSOP − DGV Tape and reel SN74AVC20T245DGVR WG245

−40

C to 85

VFBGA − GQL

Tape and reel

SN74AVC20T245GQLR

WG245

VFBGA − ZQL (Pb-free)

Tape and reel

SN74AVC20T245ZQLR

WG245

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available

at www.ti.com/sc/package.

DGG OR DGV PACKAGE

(TOP VIEW)

1DIR

1B1

1B2

GND

1B3

1B4

CCB

1B5

1B6

1B7

GND

1B8

1B9

1B10

2B1

2B2

2B3

GND

2B4

2B5

2B6

CCB

2B7

2B8

GND

2B9

2B10

2DIR

1OE

1A1

1A2

GND

1A3

1A4

CCA

1A5

1A6

1A7

GND

1A8

1A9

1A10

2A1

2A2

2A3

GND

2A4

2A5

2A6

CCA

2A7

2A8

GND

2A9

2A10

2OE

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (21 pages)

PAGE 1
SCES566F − MAY 2004 − REVISED APRIL 2005 D Control Inputs VIH/VIL Levels are D D D D D D D D DGG OR DGV PACKAGE (TOP VIEW) Referenced to VCCA Voltage VCC Isolation Feature − If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.
PAGE 2
SCES566F − MAY 2004 − REVISED APRIL 2005 description/ordering information (continued) The SN74AVC20T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input is used to disable the outputs so that the buses are isolated.
PAGE 3
SCES566F − MAY 2004 − REVISED APRIL 2005 logic diagram (positive logic) 1DIR 1 2DIR 56 1A1 29 1OE 55 2A1 2 28 2OE 42 15 1B1 2B1 To Nine Other Channels To Nine Other Channels Pin numbers shown are for the DGG and DGV packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . .
PAGE 4
SCES566F − MAY 2004 − REVISED APRIL 2005 recommended operating conditions (see Notes 4 through 8) VCCI VCCA VCCB VCCO MIN MAX Supply voltage 1.2 3.6 V Supply voltage 1.2 3.6 V VCCI × 0.65 1.6 1.2 V to 1.95 V VIH High-level input voltage Data inputs (see Note 7) 1.95 V to 2.7 V 2.7 V to 3.6 V VIL Data inputs (see Note 7) VCCI × 0.35 0.7 1.95 V to 2.7 V 2.7 V to 3.
PAGE 5
SCES566F − MAY 2004 − REVISED APRIL 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 9 and 10) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = −9 mA IOH = −12 mA 2.3 V 2.3 V 1.75 3V 3V 2.3 IOL = 100 µA IOL = 3 mA 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.
PAGE 6
SCES566F − MAY 2004 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B VCCB = 1.2 V TYP VCCB = 1.5 V TYP VCCB = 1.8 V TYP VCCB = 2.5 V TYP VCCB = 3.3 V TYP 3.8 3.1 2.8 2.7 3.3 3.
PAGE 7
SCES566F − MAY 2004 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.
PAGE 8
SCES566F − MAY 2004 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.
PAGE 9
SCES566F − MAY 2004 − REVISED APRIL 2005 typical total static power consumption (ICCA + ICCB) TABLE 1 VCCB VCCA 0V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 < 0.5 < 0.5 < 0.5 < 0.5 < 0.5 1.2 V < 0.5 <1 <1 <1 <1 1 1.5 V < 0.5 <1 <1 <1 <1 1 1.8 V < 0.5 <1 <1 <1 <1 <1 2.5 V < 0.5 1 <1 <1 <1 <1 3.3 V < 0.
PAGE 10
SCES566F − MAY 2004 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS 6 6 5 5 4 4 tPHL − ns tPLH − ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.2 V 3 2 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 3 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 2.5 V VCCB = 3.
PAGE 11
SCES566F − MAY 2004 − REVISED APRIL 2005 6 6 5 5 4 4 tPHL − ns tPLH − ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.8 V 3 2 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 3 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 2.5 V VCCB = 3.
PAGE 12
SCES566F − MAY 2004 − REVISED APRIL 2005 TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 3.3 V 6 6 5 5 4 VCCB = 2.5 V VCCB = 3.3 V 4 tPHL − ns tPLH − ns VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 3 2 3 2 VCCB = 1.2 V VCCB = 1.5 V 1 VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.
PAGE 13
SCES566F − MAY 2004 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V CL RL 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ VTP 0.1 V 0.1 V 0.15 V 0.15 V 0.
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 20-May-2013 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74AVC20T245ZQLR Package Package Pins Type Drawing BGA MI CROSTA R JUNI OR ZQL 56 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 330.0 16.4 Pack Materials-Page 1 4.8 B0 (mm) K0 (mm) P1 (mm) 7.3 1.5 8.0 W Pin1 (mm) Quadrant 16.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 26-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AVC20T245ZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 336.6 336.6 28.
PAGE 18
PAGE 19
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 20
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 21
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.