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DESCRIPTION/ORDERING INFORMATION
SN74AVC24T245
24-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES552C FEBRUARY 2004 REVISED AUGUST 2005
Control Inputs V
IH
/V
IL
Levels Are Referenced I
off
Supports Partial-Power-Down Mode
to V
CCA
Voltage Operation
V
CC
Isolation Feature If Either V
CC
Input Is at I/Os Are 4.6-V Tolerant
GND, All Outputs Are in the High-Impedance
Latch-Up Performance Exceeds 100 mA Per
State
JESD 78, Class II
Overvoltage-Tolerant Inputs/Outputs Allow
ESD Protection Exceeds JESD 22
Mixed-Voltage-Mode Data Communications
8000-V Human-Body Model (A114-A)
Fully Configurable Dual-Rail Design Allows
200-V Machine Model (A115-A)
Each Port to Operate Over Full 1.2-V to 3.6-V
1000-V Charged-Device Model (C101)
Power-Supply Range
This 24-bit noninverting bus transceiver uses two separate configurable power-supply rails. The
SN74AVC24T245 is optimized to operate with V
CCA
/V
CCB
set at 1.4 V to 3.6 V. It is operational with V
CCA
/V
CCB
as
low as 1.2 V. The A port is designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.2 V to 3.6 V. The
B port is designed to track V
CCB
. V
CCB
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC24T245 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVC24T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1 OE, 2 OE,
3 OE, 4 OE, 5 OE, and 6 OE) are supplied by V
CCA
.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V
CC
isolation feature ensures that if either V
CC
input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CCA
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
LFBGA GRG Tape and reel SN74AVC24T245GRGR
–40 ° C to 85 ° C WH245
LFBGA ZRG (Pb-free) Tape and reel SN74AVC24T245ZRGR
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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